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Pressure‐sensor miniaturization requires high‐density packaging. This means that designers are constantly faced with all kinds of challenging, and sometimes impossible, requirements. In this paper we will present three examples with specific technologies and aspects of miniaturization and packaging. The first example is a pressure switch, the second a pressure sensor and the third a smart pressure sensor.

The opportunity for mutual benefit across Europe to develop low‐cost MCM technologies arose from recognition of the scientific skills and design and prototyping capabilities in organic and inorganic circuits in countries of Central Europe. As a result, the leading research institutions and small/medium‐size enterprises of Hungary, Romania and Slovenia together with relevant institutions of the UK and Belgium proposed and received approval for a European Union INCO‐Copernicus project “Cheap multichip models” to establish fast prototyping low cost multichip module (MCM) technology facilities. The project commenced in May 1997.

The European Commission has decided that from the second half of 2006 only lead‐free solder pastes will be permitted for use in the electronics industry. Earlier results of testing showed that lead‐free solder pastes may not be appropriate for both printed‐circuit‐board (PCB) and hybrid‐circuit applications, because of the materials' compatibility with the soldering process and with the solder pads. The basic properties of the investigated pastes show which of the tested solder pastes can be used for both applications. After selection of the appropriate solder pastes, reliability tests were conducted. The surface insulation resistance was tested for both the hybrid circuits and PCBs, whereas the mechanical strength of the soldered joints of components was only tested for the PCBs.

Several commercially available epoxy and polyimide adhesives were tested. The properties essential for the use of adhesives in microelectronics are stated and their compliance with the requirements of standard MIL‐A‐87‐172 was evaluated.

An evaluation of some silicone and epoxy materials for primary chip and top coatings on hybrid circuits and of their relative merits on the basis of humidity and temperature cycling is presented.

The purpose of this paper is to carry out a comprehensive experimental investigation into the role of screen and conductive carbon material formulation on line conductivity and printing capability in the screen printing process, to provide design knowledge and further understanding of the screen printing for printed carbon.

A full factorial experiment was carried out where six carbon materials were printed through ten screens to a polyester substrate under a set of standard conditions.

Material characterization showed that viscosity and the corresponding viscous and elastic material modulli increased with solids content and that the elastic properties at low shear are significant. The solids carbon content materials were unable to produce the minimum printable line features possible with the low carbon materials. Increasing the solids contents reduced the final cured line resistance, reduced the printed line width, increased the film thickness, increased the cross sectional area and reduced the material resistivity. Material resistivities were around 700 to 950 μΩcm were obtained in the printed lines.

Lower material resistivities were obtained with higher solids materials and it is postulated that the increased visco‐elastic nature of the solids content materials, play a role in determining the microscopic structure of the cured film through alignment of the carbon graphite platelets.

A dataset which allows material, screen and print characteristics has been created allowing process optimization and formulation development to be accelerated.

The work provides insight into the role of material properties and process settings on the electrical and physical characteristics of printed carbon.

The purpose of this paper is to present the results of experiments performed to attach silicon dies (chips) to low‐temperature co‐fired ceramic (LTCC) substrates with Ag or AgPd pads using SnAgCu or SnPb solder and the results of the characterization of the solder joints.

LTCC substrates were fabricated by stacking and laminating four green tapes with the top layer screen‐printed with Ag or AgPd paste to form pads. Silicon die sizes of 1 × 1 mm and 2 × 2 mm with electroless nickel immersion gold plated were soldered to 2 × 2 mm pads on the LTCC substrates using SnPb or SnAgCu solder. The solder joints were then characterized using X‐ray, die shear, energy dispersive X‐ray and scanning electron microscopy techniques.

The joints made by AgPd pads with SnAgCu solder provided the best results with the highest shear strength having strong interfaces in the joints. However, the joints of Ag pads with SnPb solder did not provide high‐shear strength.

The findings provide certain guidelines to implement LTCC applications. AgPd pads with SnAgCu solder can be considered for applications where small silicon dies need to be attached to LTCC substrates. However, Ag pads with SnAgCu solder can be considered for lead‐free solder applications.

This paper seeks to review recent advances in wire bonding, flip chip and lead‐free solder for advanced microelectronics packaging.

Of the 91 journal papers, 59 were published in 2005‐2007 and topics related to wire bonding, flip chip and lead‐free solder for advanced microelectronics packaging are reviewed.

Research on advanced wire bonding is continuously performed for advanced and complex applications such as stacked‐dies wire bonding, wire bonding of low‐k ultra‐fine‐pitch devices, and copper wire bonding. Owing to its many advantages, flip chip using adhesive has gained more popularity. Research on the reliability of lead‐free solder joints is being conducted world‐wide. The new challenges, solutions and new developments are discussed in this paper.

Because of page limitation of this review paper and the large number of the journal papers available, only a brief review is conducted. Further reading is needed for more details.

This review paper attempts to provide introduction to recent developments and the trends in terms of the topics for advanced microelectronics packaging. With the references provided, readers may explore more deeply, focusing on a particular issue.

This paper aims to propose an innovative parametric design for artificial neural network (ANN) modeling for the multi-quality function problem to determine the optimal process scenarios.

The innovative hybrid algorithm gray relational analysis (GRA)-ANN and the GRA-Entropy are proposed to effectively solve the multi-response optimization problem.

Both the GRA-ANN and the GRA-Entropy analytical approaches find that the optimal process scenario is a stencil aperture of 57 per cent and immediate processing of the printed circuit board after exposure to a room environment.

A six-week confirmation test indicates that the optimal process has improved quad flat non-lead assembly yield from 99.12 to 99.78 per cent.