No‐clean flux printed board appraisal tests were conducted with all materials used in the production process. Metallic growths during environmental testing revealed that there was…
Abstract
No‐clean flux printed board appraisal tests were conducted with all materials used in the production process. Metallic growths during environmental testing revealed that there was incompatibility between some materials used. Initial tests with two solder resists and several fluxes showed that one non solder resisted board, soldered using a synthetically activated (SA) flux, had surface insulation resistance (SIR) two decades higher than those using low solids flux (LSF) or other SAs. For boards with solder resist, the SIR of those soldered using LSFs was higher, however, than those using SA fluxes. SIR dependence on temperature and humidity was investigated. Results demonstrated that the dominant factor to determine the SIR of a no‐clean board was the characteristics of the board substrate finish. SIR changes with condensation were logged and found to be significant for solder resist finishes. Tests proved that reducing the contamination levels under and on top of the solder resist, by using hot de‐ionised water rinsing, enabled the calculated minimum SIR level to be achieved for spray fluxed boards and minimised the possibility of metallic growth. Visual examination proved to be at least as important as SIR testing. No‐clean processes were appraised using sequential environmental conditions with differing SIR pass levels. As a result of this appraisal a maximum ionic contamination level of 0·5 μg/cm2 NaCl equivalent and Dl water rinses, before and after solder resist added, will be introduced. Ionic contamination tests indicated that contamination levels reduced with elapsed time, probably due to ionic molecules locking more firmly into the board surface structure. A novel method for SIR measurements at any voltage, developed by the author, is described. It is hoped that this paper will further the understanding of no‐clean flux issues and highlight potential solutions and pitfalls.
The paper reviews U‐V curable screen‐printable etch plating and solder resists, their basic components, principles of U‐V curing, their performance in the liquid as well as in the…
Abstract
The paper reviews U‐V curable screen‐printable etch plating and solder resists, their basic components, principles of U‐V curing, their performance in the liquid as well as in the solid state and their advantages. Also discussed are the basic construction and performance of U‐V curing equipment.
Over the last few years, the increase in size of printed circuit boards, together with the increase in density of components, has made successful application of soldermask by…
Abstract
Over the last few years, the increase in size of printed circuit boards, together with the increase in density of components, has made successful application of soldermask by conventional screen printing more and more difficult. This is despite improvements in both the screen printing resists and the equipment used. The accuracy produced by the photo‐imaging technique has been firmly established with the now almost universal use of dry‐film resist for the plating and etching of printed circuit boards. This led to the introduction of the dry‐film soldermask, but, unlike the dry‐film resists used for plating and etching, this type of soldermask has failed to gain universal acceptance, mainly because of technical shortcomings and high costs. The application of liquid soldermasks overcomes many of these technical problems, although the first attempts to achieve acceptable results required special equipment and huge capital investment. Photo‐imageable soldermasks which can be applied using the conventional printing and exposure equipment, available at printed circuit manufacturers, are now available. Some are processed in aqueous solutions, whilst others are processed in halogenated solvents of the types used in the processing of dry‐film resists. The introduction of such soldermasks makes available the combined advantage of liquid application and photo‐imaging, which will increase the overall quality of printed circuit boards produced, while utilising existing screen printed, oven, photo‐exposure unit and conveyorised spray developer.
Naeemul Islam, Nur Syahadah Yusof, Mohamed Fauzi Packeer Mohamed, Syamsul M., Muhammad Firdaus Akbar Jalaludin Khan, Nor Azlin Ghazali and Mohd Hendra Hairi
The purpose of this study is to demonstrate a pseudomorphic High Electron Mobility Transistor (pHEMT) cutoff frequency (fT) and maximum oscillation frequency (fmax) are determined…
Abstract
Purpose
The purpose of this study is to demonstrate a pseudomorphic High Electron Mobility Transistor (pHEMT) cutoff frequency (fT) and maximum oscillation frequency (fmax) are determined by the role of its gate length (Lg). Theoretically, to obtain an Lg of 1 µm, the gate’s resist opening must be 1 µm wide. However, after the coat-expose-develop (C-E-D) process, the Lg became 13% larger after metal evaporation. This enlargement is due to both resist thickness and its profile.
Design/methodology/approach
This research aims to optimize the 1-µm Lg InGaAs-InAlAs pHEMT C-E-D process, where the diluted AZ®nLOF™ 2070 resist with AZ® EBR solvent technique has been used to solve the Lg enlargement problem. The dilution theoretically allows the changing of a resist thickness to different film thickness using the same coating parameters. Here, for getting a new resist, which is simply called AZ 0.5 µm, the experiment’s important parameters such as the coater’s spin speed of 3,000 rpm and soft bake at 110°C for 5 min are executed.
Findings
The newly mixed AZ 0.5 µm resist has presented a high resolution and undercut profile rather than standard AZ 1 µm resist. Hence, the Lg metallization after using AZ 0.5 µm optimized process showed better results than AZ 1 µm which used the standard process.
Originality/value
The outcome of the optimization has reached that it is possible to get a nearly sub-µm range gate’s opening using a diluted resist, and at the same time retaining a high resolution and undercut profile.
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Screenprinting has formed an integral part of the manufacturing process for PCBs since the first boards were produced. This paper describes the types of product used, the areas of…
Abstract
Screenprinting has formed an integral part of the manufacturing process for PCBs since the first boards were produced. This paper describes the types of product used, the areas of application, and suggests methods for obtaining the best results by exploring printing parameters and indicating methods of optimising them to minimise faults.
The author continues his series of articles on printed circuit troubleshooting in this issue of the Journal by examining screen printing techniques. The problems associated with…
Abstract
The author continues his series of articles on printed circuit troubleshooting in this issue of the Journal by examining screen printing techniques. The problems associated with alkali soluble, solvent soluble, solder and plating resists, as well as notation inks, are examined in some detail. Possible causes and suggested remedies are tabulated.
Walter G. Hertlein, Kent Törnkvist and Kevin Smith
The ever‐increasing miniaturization and integration of additional functions in the electronics industry – in particular in the next generation telecomm technologies – needs a…
Abstract
The ever‐increasing miniaturization and integration of additional functions in the electronics industry – in particular in the next generation telecomm technologies – needs a paradigm shift in manufacturing technologies in order to achieve the results along the roadmaps of the industry. Handling of thin substrates, doing finest line circuitry, working on non‐flat surfaces and having to protect metallized holes during etching processes, are asking for conformal resist coatings. Electrophoretically deposited positive working photo resists encompass these requirements. The principles of electrophoretic photo resists, the necessary equipment, the cooperation between customer, the supplier of process chemistry and the supplier of the equipment to start such a complex project, and start‐up results of the new major production line for ED‐resist in Europe are discussed.
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Tsung-Sheng Chang and Wei-Hung Hsiao
The rise of artificial intelligence (AI) applications has driven enterprises to provide many intelligent services to consumers. For instance, customers can use chatbots to make…
Abstract
Purpose
The rise of artificial intelligence (AI) applications has driven enterprises to provide many intelligent services to consumers. For instance, customers can use chatbots to make relevant inquiries and seek solutions to their problems. Despite the development of customer service chatbots years ago, they require significant improvements for market recognition. Many customers have reported negative experiences with customer service chatbots, contributing to resistance toward their use. Therefore, this study adopts the innovation resistance theory (IRT) perspective to understand customers’ resistance to using chatbots. It aims to integrate customers’ negative emotions into a predictive behavior model and examine users’ functional and psychological barriers.
Design/methodology/approach
In this study, we collected data from 419 valid individuals and used structural equation modeling to analyze the relationships between resistance factors and negative emotions.
Findings
The results confirmed that barrier factors affect negative emotions and amplify chatbot resistance influence. We discovered that value and risk barriers directly influence consumer use. Moreover, both functional and psychological barriers positively impact negative emotions.
Originality/value
This study adopts the innovation resistance theory perspective to understand customer resistance to using chatbots, integrates customer negative emotions to construct a predictive behavior model and explores users’ functional and psychological barriers. It can help in developing online customer service chatbots for e-commerce.
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he development of printed circuit technology is almost inseparable from the development of materials. Copper clad laminates could be said to have started with the discovery of…
Abstract
he development of printed circuit technology is almost inseparable from the development of materials. Copper clad laminates could be said to have started with the discovery of phenolic resins by Dr Leo Baekeland in 1909. He found that by using catalysts he could control the speed and extent of the reaction of phenol with formaldehyde, suspending the reaction at any time to add reinforcements. Using resins in a liquid form he was able to combine them with wood cloth, paper or fibre to build an insulating material.
Paavo Jalonen and Aulis Tuominen
Photolithographic techniques are universally employed in multi‐layer printed circuit board manufacturing. The growing demand for miniaturization of electronics means that finer…
Abstract
Photolithographic techniques are universally employed in multi‐layer printed circuit board manufacturing. The growing demand for miniaturization of electronics means that finer lines and smaller vias are increasingly required and these very fine lines on the substrate are increasingly difficult to produce by conventional means. One very promising means of meeting these fine line requirements is via the etching of sputtered thin films on a substrate and then growing copper on these lines using an additive method. In this work we tested the capability of an electrodeposited, positive‐acting photoresist for patterning thin film circuits on sputtered seed layers such as chromium. A fully additive electroless copper was then used to produce the copper lines. Epoxy reinforced fibreglass was used as a core material. The performance and quality properties of the process were examined, along with limitations of the process when compared with both a conventional dry film method and a spin coating method.