No‐clean Flux Appraisal — The Total Process Approach

Abstract

No‐clean flux printed board appraisal tests were conducted with all materials used in the production process. Metallic growths during environmental testing revealed that there was incompatibility between some materials used. Initial tests with two solder resists and several fluxes showed that one non solder resisted board, soldered using a synthetically activated (SA) flux, had surface insulation resistance (SIR) two decades higher than those using low solids flux (LSF) or other SAs. For boards with solder resist, the SIR of those soldered using LSFs was higher, however, than those using SA fluxes. SIR dependence on temperature and humidity was investigated. Results demonstrated that the dominant factor to determine the SIR of a no‐clean board was the characteristics of the board substrate finish. SIR changes with condensation were logged and found to be significant for solder resist finishes. Tests proved that reducing the contamination levels under and on top of the solder resist, by using hot de‐ionised water rinsing, enabled the calculated minimum SIR level to be achieved for spray fluxed boards and minimised the possibility of metallic growth. Visual examination proved to be at least as important as SIR testing. No‐clean processes were appraised using sequential environmental conditions with differing SIR pass levels. As a result of this appraisal a maximum ionic contamination level of 0·5 μg/cm2 NaCl equivalent and Dl water rinses, before and after solder resist added, will be introduced. Ionic contamination tests indicated that contamination levels reduced with elapsed time, probably due to ionic molecules locking more firmly into the board surface structure. A novel method for SIR measurements at any voltage, developed by the author, is described. It is hoped that this paper will further the understanding of no‐clean flux issues and highlight potential solutions and pitfalls.

Citation

Mason, B.J. (1994), "No‐clean Flux Appraisal — The Total Process Approach", Circuit World, Vol. 20 No. 2, pp. 21-32. https://doi.org/10.1108/eb046249