RETRACTED: Design and implementation of high-speed and low-power consumption Moore-based loopback adder on FPGA
International Journal of Intelligent Unmanned Systems
ISSN: 2049-6427
Article publication date: 18 February 2021
Issue publication date: 7 January 2022
Retraction notice
The publishers of the International Journal of Intelligent Unmanned Systems wish to retract the Mohan Kumar, B.N. and Rangaraju, H.G. (2022), “Design and implementation of high-speed and low-power consumption Moore-based loopback adder on FPGA”, International Journal of Intelligent Unmanned Systems, Vol. 10 No. 1, pp. 145-158. https://doi.org/10.1108/IJIUS-09-2020-0056
An internal investigation into a series of submissions has uncovered evidence that the peer review process was compromised. As a result of these concerns, the findings of the article cannot be relied upon. This decision has been taken in accordance with Emerald’s publishing ethics and the COPE guidelines on retractions.
The authors of this paper would like to note that they do not agree with the content of this notice.
The publishers of the journal sincerely apologize to the readers
Abstract
Purpose
Finite impulse response (FIR) digital filters are a general element in several digital signal processing (DSP) systems. In VLSI platform, FIR is a developing filter because the complexity of design grows with the length of the FIR filter and also it has less latency. Generally, the FIR filter is designed dominated by the multiplier and adder. The conventional FIR filters occupy more area because of several numbers of adders and multipliers for filter designs.
Design/methodology/approach
To overcome this issue, the Vedic Multiplier (VM) and Moore-based LoopBack Adder (MLBA) approach-based optimal FIR filter were designed in this research. Normally, the coefficient has been generated manually, which performs the FIR filter operation. So, the coefficient was generated from the MATLAB filter design and analysis tool. All pass coefficient was introduced in this research, which performs the processing element (PE). The VM approach was utilized in the PE to multiply the filter inputs and coefficients. This research employs the Moore-based LBA (MLBA) in the accumulator for the adding output of the PE. An MLBA approach is a significantly reduced area and increases speed by applying a looping transform function. Here, the proposed method is called a VM-MLBA-FIR filter. In this research, the FIR filter was done in Field Programmable Gate Array (FPGA) Xilinx by using Verilog code on various Virtex devices.
Findings
The experiment results showed that VM-MLBA-FIR filter reduced 26.88% of device utilization and 0.32 W of minimum power consumption compared to the existing PSA-FIR filter.
Originality/value
The experiment results showed that VM-MLBA-FIR filter reduced 26.88% of device utilization and 0.32 W of minimum power consumption compared to the existing PSA-FIR filter.
Keywords
Citation
Mohan Kumar, B.N. and Rangaraju, H.G. (2022), "RETRACTED: Design and implementation of high-speed and low-power consumption Moore-based loopback adder on FPGA", International Journal of Intelligent Unmanned Systems, Vol. 10 No. 1, pp. 145-158. https://doi.org/10.1108/IJIUS-09-2020-0056
Publisher
:Emerald Publishing Limited
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