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Article
Publication date: 1 April 1994

M.S. Obrecht, E.L. Heasell and M.I. Elmasry

Computational speed and robustness of the coupled (MEDICI) and decoupled (TRASIM) method based simulators are compared. Transient and steady‐state avalanche simulations are…

44

Abstract

Computational speed and robustness of the coupled (MEDICI) and decoupled (TRASIM) method based simulators are compared. Transient and steady‐state avalanche simulations are presented. The decoupled method shows significantly lower memory requirements, higher robustness and up to 30 times higher speed.

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COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 13 no. 4
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 1 April 1993

M.S. OBRECHT and M.I. ELMASRY

Enhanced efficiency of the proposed modification of the Gummel decoupled method enables significant reduction of memory requirements in comparison to the conventionally used…

76

Abstract

Enhanced efficiency of the proposed modification of the Gummel decoupled method enables significant reduction of memory requirements in comparison to the conventionally used Newton‐like methods with approximately equal CPU time expense. For 10,000 mesh nodes it only requires 4.4 Mbytes of virtual memory (compare to 62 Mbytes for PISCES‐2B). The method exhibits good stability and convergence rate and has significant advantages compared to the other often used half‐implicit scheme. Low memory requirements and efficiency make the method attractive for future 3‐D applications.

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COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 12 no. 4
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 3 February 2020

Afreen Khursheed and Kavita Khare

This paper is an unprecedented effort to resolve the performance issue of very large scale integrated circuits (VLSI) interconnects encountered because of the scaling of device…

142

Abstract

Purpose

This paper is an unprecedented effort to resolve the performance issue of very large scale integrated circuits (VLSI) interconnects encountered because of the scaling of device dimensions. Repeater interpolation technique is an effective approach for enhancing speed of interconnect network. Proposed buffers as repeater are modeled by using dual chirality multi-Vt technology to reduce delay besides mitigating average power consumption. Interconnects modeled with carbon nanotube (CNT) technology are compared with copper interconnect for various lengths. Buffer circuits are designed with both CNT and metal oxide semiconductor technology for comparison by using various combination of (CMOSFET repeater-Cu interconnect) and (CNTFET repeater-CNT interconnect). Compared to conventional buffer, ProposedBuffer1 saves dynamic power by 84.86%, leakage power by 88% and offers reduction in delay by 72%. ProposedBuffer2 brings about dynamic power saving of 99.94%, leakage power saving of 93%, but causes delay penalty. Simulation using Stanford SPICE model for CNT and silicon-field effective transistor berkeley short-channel IGFET Model4 (BSIM4) predictive technology model (PTM) for MOS is done in H simulation program with integrated circuit emphasis for 32 nm.

Design/methodology/approach

Usually, the dynamic power consumption dominates the total power, while the leakage power has a negligible effect. But with the scaling of device technology, leakage power has become one of the important factors of consideration in low power design techniques. Various strategies are explored to suppress the leakage power in standby mode. The adoption of a multi-threshold design strategy is an effective approach to improve the performance of buffer circuits without compromising on the delay and area overhead. Unlike MOS technology, to implement multi-Vt transistors in case of CNT technology is quite easy. It can be achieved by varying diameter of carbon nanotubes using chirality control.

Findings

An unprecedented approach is taken for optimizing the delay and power dissipation and hence drastically reducing energy consumption by keeping proper harmony between wire technology and repeater-buffer technology. This paper proposes two novel ultra-low power buffers (PB1 and PB2) as repeaters for high-speed interconnect applications in portable devices. PB1 buffer implemented with high-speed CML technique nested with multi-threshold (Vt) technology sleep transistor so as to improve the speed along with a reduction in standby power consumption. PB2 is judicially implemented by inserting separable sized, dual chirality P type carbon nanotube field effective transistors. The HSpice simulation results justify the correctness of schemes.

Originality/value

Result analysis points out that compared to conventional Cu interconnect, the CNT interconnects paired with Proposed CNTFET buffer designs are more energy efficient. PB1 saves dynamic power by 84.86%, reduces propagation delay by 72% and leakage power consumption by 88%. PB2 brings about dynamic power saving of 99.4%, leakage power saving of 93%, with improvement in speed by 52%. This is mainly because of the fact that CNT interconnect offers low resistance and CNTFET drivers have high mobility and ballistic mode of operation.

Details

Circuit World, vol. 46 no. 2
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 1 April 1994

Hamid Z. Fardi

Numerical device simulation is developed to study the steady‐state and transient current‐voltage characteristics of double heterostructure AlGaAs/GaAs PNPN electro‐photonic device…

38

Abstract

Numerical device simulation is developed to study the steady‐state and transient current‐voltage characteristics of double heterostructure AlGaAs/GaAs PNPN electro‐photonic device when its performance is influenced by the presence of interface and bulk recombination mechanism. The simulation results show that the holding current and voltage and the breakover point are strongly affected by varying the minority carrier lifetime at outer heterojunctions. Numerical results also indicate that shortening the minority carrier lifetime in the inner PN homojunction region only increases the OFF‐state current. These results are in agreement with experimental data on AlGaAs/GaAs PNPN devices. The numerical modelling approach taken in this study is shown to be essential in the design and optimization of PNPN switch.

Details

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, vol. 13 no. 4
Type: Research Article
ISSN: 0332-1649

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Article
Publication date: 1 December 2005

Anu Gupta and Chandra Shekhar

The objective is to explore various adder architectures using different logic‐design styles and transistor‐sizes for different operand sizes. The scope of this work is the…

712

Abstract

Purpose

The objective is to explore various adder architectures using different logic‐design styles and transistor‐sizes for different operand sizes. The scope of this work is the development of tools, which can be used to predict an optimum adder design for a given application based on the speed and energy‐consumption constraints.

Design/methodology/approach

The work has been carried out in two parts. In the first part, simulation results were generated using five different architectures; each designed using four logic design styles for three different transistor sizes. The designs were simulated to generate the values of worst‐case propagation delay and energy consumption per addition. This information is used for validating the delay and energy consumption per addition in the second part.

Findings

Optimum adder design under varying condition can be found out using this work.

Research limitations/implications

The predictive model does not consider the variation in load capacitance of each cell.

Practical implications

At present, a prime requirement in application specific integrated circuit design is reduction in design cycle time. As a result, there is minimum scope for exploration of arithmetic units in order to choose the best‐suited design. This work will help the designers to choose an optimum adder design for a given set of requirements.

Originality/value

In this work, four degrees of freedom are taken in adder design space, which are not taken before. Here, the adder design space has been explored, studied, and analyzed in this study under so many varying conditions.

Details

Microelectronics International, vol. 22 no. 3
Type: Research Article
ISSN: 1356-5362

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Article
Publication date: 8 March 2018

Amit Kumar Pandey, Tarun Kumar Gupta and Pawan Kumar Verma

This paper aims to propose a new sleep signal controlled footless domino circuit for reducing the subthreshold and gate oxide leakage currents.

96

Abstract

Purpose

This paper aims to propose a new sleep signal controlled footless domino circuit for reducing the subthreshold and gate oxide leakage currents.

Design/methodology/approach

In the proposed circuit, a P channel MOSFET (PMOS) sleep switch transistor is inserted between the power supply and the output node. The sleep transistor, the source of the pull-down network, and the source of the N channel MOSFET (NMOS) transistor of the output inverter are controlled by this additional sleep signal to place the footless domino circuit in a low leakage state.

Findings

The authors simulate the proposed circuit by using HSPICE in 45-nm CMOS technology for OR and AND logic gates such as OR2, OR4, OR8, AND2 and AND4 at 25°C and 110°C. The proposed circuit reduces leakage power consumption as compared to the existing circuits.

Originality/value

The proposed circuit significantly reduces the total leakage power consumption up to 99.41 and 99.51 per cent as compared to the standard dual-threshold voltage footless domino circuits at 25°C and 110°C, respectively, and up to 93.79 and 97.98 per cent as compared to the sleep control techniques at 25°C and 110°C, respectively. Similarly, the proposed circuit reduces the active power consumption up to 26.76 and 86.25 per cent as compared to the standard dual-threshold voltage and sleep control techniques footless domino circuits at 25°C and 110°C, respectively.

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Article
Publication date: 1 September 2006

Mohd‐Shahiman Sulaiman

This paper presents a prediction on the impact of technology scaling on phase‐locked loop (PLL) performance behaviour. Power and maximum operating frequency of an Analogue PLL and…

340

Abstract

Purpose

This paper presents a prediction on the impact of technology scaling on phase‐locked loop (PLL) performance behaviour. Power and maximum operating frequency of an Analogue PLL and a Type II phase‐frequency detector (PFD)‐based PLL from which the behaviours of other PLLs derived from the two architectures can be estimated, are analysed and their future behaviours as a function of technology are predicted.

Design/methodology/approach

Analogue models were developed and Mentor Graphics VHDL‐AMS mixed‐signal simulations were performed on the two PLL architectures. Behavioural power and frequency equations as a function of technology were derived based on thorough data and graphical analyses.

Findings

A prediction of PLL frequency and power dissipation as a function of technology for two main PLL architectures.

Research limitations/implications

The parameters in each equation derived should include other contributing factors as well as other design approaches such as multi‐VDD, multi‐Vth, etc. future work should also include prediction of jitter and phase noise for the two main PLL topologies.

Originality/value

This paper is of high significance in PLL design. The predicted equations could be used to reduce a major portion of a PLL designers' design time when choosing a PLL topology, and help them predict the impact of technology on the performance of the chosen architecture.

Details

Microelectronics International, vol. 23 no. 3
Type: Research Article
ISSN: 1356-5362

Keywords

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Article
Publication date: 1 April 2003

Heng‐Li Yang

This research conducted two experiments to understand the performance (correctness and efficiency) of novice database designers, and perceptions of ease of use and preferences of…

6354

Abstract

This research conducted two experiments to understand the performance (correctness and efficiency) of novice database designers, and perceptions of ease of use and preferences of two approaches for modeling relational databases: the semantic‐oriented approach (top‐down, e.g. using the entity‐relationship model) and the logical‐oriented approach (bottom‐up, view decomposition, focusing only on the logical model). The findings indicated that in experiment 1, semantic‐oriented treatments performed better in a complex, written‐text case; logical‐oriented treatments were better in a simple, tabular‐form case. The same situation happened in experiment 2 though the differences were not statistically significant.

Details

Industrial Management & Data Systems, vol. 103 no. 3
Type: Research Article
ISSN: 0263-5577

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Article
Publication date: 10 January 2025

Khaldoon Albitar, Khaled Hussainey, Ahmed A. El-Masry and Hidaya Al Lawati

Modern slavery is a significant issue addressed in the United Nations’ Sustainable Development Goals. In 2015, the UK Government introduced the Modern Slavery Act as part of a…

128

Abstract

Purpose

Modern slavery is a significant issue addressed in the United Nations’ Sustainable Development Goals. In 2015, the UK Government introduced the Modern Slavery Act as part of a crucial broader set of initiatives that aimed to attack modern slavery. Regardless of the initiatives taken to mitigate this risk, little is known about how modern slavery disclosure affects corporate financial performance (CFP). Hence, our study aims to examine the impact of MSD on CFP empirically. It also examines the moderating role of governance quality on the MSD–CFP nexus.

Design/methodology/approach

We use computer-based content analysis to assess MSD levels for a sample of non-financial companies' annual reports. We use regression analysis to test our research hypotheses for a sample period of 2013–2019 for Financial Times Stock Exchange (FTSE) All-Share non-financial UK firms. Our sample consisted of 786 observations.

Findings

We provide new empirical evidence that externally communicating modern slavery information in annual report narratives is associated with CFP. The finding is in line with stakeholder theory, which states that engaging in social responsibility practices and responding favourably to the stakeholders’ interests and desires would enhance corporations’ reputation and ultimately improve their performance. We further highlight the role of governance quality in this nexus and find that the interaction between governance quality and MSD is negative, suggesting a replacement effect.

Social implications

Our findings can be of interest to government, policymakers and other stakeholders. Policymakers need to establish a new, broader set of enforcement arrangements for MSD that may lead to better CFP.

Originality/value

Our research idea is original as it links emerging global issues (e.g. MSD) with traditional corporate concerns (financial performance) in a way that is likely to provide new insights as well as managerial and policy implications.

Details

Journal of Accounting Literature, vol. ahead-of-print no. ahead-of-print
Type: Research Article
ISSN: 0737-4607

Keywords

Available. Open Access. Open Access
Article
Publication date: 5 November 2024

Thandiwe Hlatshwayo, Fidelis Emuze and John Julian Smallwood

The regulation of the construction industry remains a significant obstacle to economic progress in developing nations. Therefore, this study aimed to assess the efficacy of the…

227

Abstract

Purpose

The regulation of the construction industry remains a significant obstacle to economic progress in developing nations. Therefore, this study aimed to assess the efficacy of the legislative framework in the construction industry, focusing on Eswatini. The construction industry plays a critical role in the upliftment of the economy and an effective and efficient legislative framework is essential to ensure that as a developing country, Eswatini derives maximum benefits from the sector.

Design/methodology/approach

A phenomenological research design was used to explore stakeholders’ perceptions about the purpose of the legislative framework in the Eswatini construction industry and to establish the effectiveness of the current legislative framework in fulfilling its mandate. The data were collected using semi-structured interviews with open-ended questions. A total of 45 participants occupying different positions within the construction industry were selected using purposive sampling. The data were analysed thematically.

Findings

The results reiterate that the legislative framework’s purpose is to regulate, control and guide sectoral operations, including enforcing compliance with statutes and payment of construction levies. However, the legislative framework does not effectively fulfil its purpose of addressing stakeholder needs. Overall, the findings indicate shortcomings and inefficiencies within the framework aimed at regulating the construction industry of Eswatini. The inefficiencies have a great potential of defeating the purpose of the entire framework.

Research limitations/implications

Regarding implications for future research, the current study has set a new pathway for legislative framework analysis and evaluation. Therefore, future research on the topic can build on the current study and compare the legislative frameworks across developing countries. The purpose would be to establish the similarities and differences, and to identify strengths and weaknesses, possibly leading to established principles of what works in a given context. Other studies on the topic could focus on benchmarking against developed countries on how they measure the efficacy of the legislative framework within their constriction industry.

Practical implications

Based on the preceding, these findings may apply to similar developing countries at a similar stage of construction industry development. However, the findings should be considered within the limitations of the study. The focus was on developing countries, particularly the Eswatini context. Each country presents a unique context and challenges, so the findings should be cautiously generalized.

Originality/value

While other studies in different contexts focus on developing legislative frameworks, the current study evaluated an existing legislative framework using defined criteria. The current study made a unique contribution by streamlining the features of effective and ineffective legislative frameworks. Hitherto, such information was scattered in literature but has been consolidated and applied empirically. Thus, the study has set benchmarks for analysing and evaluating legislative frameworks in developing countries.

Details

Built Environment Project and Asset Management, vol. 15 no. 1
Type: Research Article
ISSN: 2044-124X

Keywords

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