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Article
Publication date: 15 May 2009

J.H.‐G. Ng, M.P.Y. Desmulliez, M. Lamponi, B.G. Moffat, A. McCarthy, H. Suyal, A.C. Walker, K.A. Prior and D.P. Hand

The purpose of this paper is to present a novel manufacturing process that aims to pattern metal tracks onto polyimide at atmospheric pressure and ambient environment. The process…

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Abstract

Purpose

The purpose of this paper is to present a novel manufacturing process that aims to pattern metal tracks onto polyimide at atmospheric pressure and ambient environment. The process can be scaled up for industrial applications.

Design/methodology/approach

From a thorough literature survey, different approaches were carried out for processing polyimide. Following a design of experiments for the processing and various characterisation techniques, a micro‐coil was manufactured as a test demonstrator.

Findings

The characteristics of some main formaldehyde‐based electroless copper baths were compared. The quality of the sidewalls was characterised and the performance of the process was assessed.

Originality/value

This paper demonstrates a high‐value manufacturing technique that is mass manufacturable, low cost and suitable for use on 3D surfaces. Criteria required for the development of a direct‐writing process have been described. The issues surrounding electroless plating on polyimide have been explained.

Details

Circuit World, vol. 35 no. 2
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 3 July 2007

T. Tilford, K.I. Sinclair, C. Bailey, M.P.Y. Desmulliez, G. Goussettis, A.K. Parrott and A.J. Sangster

This paper aims to present an open‐ended microwave curing system for microelectronics components and a numerical analysis framework for virtual testing and prototyping of the…

460

Abstract

Purpose

This paper aims to present an open‐ended microwave curing system for microelectronics components and a numerical analysis framework for virtual testing and prototyping of the system, enabling design of physical prototypes to be optimized, expediting the development process.

Design/methodology/approach

An open‐ended microwave oven system able to enhance the cure process for thermosetting polymer materials utilised in microelectronics applications is presented. The system is designed to be mounted on a precision placement machine enabling curing of individual components on a circuit board. The design of the system allows the heating pattern and heating rate to be carefully controlled optimising cure rate and cure quality. A multi‐physics analysis approach has been adopted to form a numerical model capable of capturing the complex coupling that exists between physical processes. Electromagnetic analysis has been performed using a Yee finite‐difference time‐domain scheme, while an unstructured finite volume method has been utilized to perform thermophysical analysis. The two solvers are coupled using a sampling‐based cross‐mapping algorithm.

Findings

The numerical results obtained demonstrate that the numerical model is able to obtain solutions for distribution of temperature, rate of cure, degree of cure and thermally induced stresses within an idealised polymer load heated by the proposed microwave system.

Research limitations/implications

The work is limited by the absence of experimentally derived material property data and comparative experimental results. However, the model demonstrates that the proposed microwave system would seem to be a feasible method of expediting the cure rate of polymer materials.

Originality/value

The findings of this paper will help to provide an understanding of the behaviour of thermosetting polymer materials during microwave cure processing.

Details

Soldering & Surface Mount Technology, vol. 19 no. 3
Type: Research Article
ISSN: 0954-0911

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Article
Publication date: 1 August 2016

Thomas D.A. Jones, David Flynn, Marc P.Y. Desmulliez, Dennis Price, Matthew Beadel, Nadia Strusevich, Mayur Patel, Chris Bailey and Suzanne Costello

This study aims to understand the influence of megasonic (MS)-assisted agitation on printed circuit boards (PCBs) electroplated using copper (Cu) electrolyte solutions to improve…

193

Abstract

Purpose

This study aims to understand the influence of megasonic (MS)-assisted agitation on printed circuit boards (PCBs) electroplated using copper (Cu) electrolyte solutions to improve plating efficiencies through enhanced ion transportation.

Design/methodology/approach

The impact of MS-assisted agitation on topographical properties of the electroplated surfaces was studied through a design of experiments by measuring surface roughness, which is characterised by values of the parameter Ra as measured by white light phase shifting interferometry and high-resolution scanning electron microscopy.

Findings

An increase in Ra from 400 to 760 nm after plating was recorded for an increase in acoustic power from 45 to 450 W. Roughening increased because of micro-bubble cavitation energy and was supported through direct imaging of the cavitation. Current thieving effect by the MS transducer induced low currents, leading to large Cu grain frosting and reduction in the board quality. Current thieving was negated in plating trials through specific placement of transducer. Wavy electroplated surfaces, due to surface acoustic waves, were also observed to reduce the uniformity of the deposit.

Research limitations/implications

The formation of unstable transient cavitation and variation of the topology of the Cu surface are unwanted phenomena. Further plating studies using MS agitation are needed, along with fundamental simulations, to determine how the effects can be reduced or prevented.

Practical implications

This study can help identify manufacturing settings required for high-quality MS-assisted plating and promote areas for further investigation, leading to the development of an MS plating manufacturing technique.

Originality/value

This study quantifies the topographical changes to a PCB surface in response to MS agitation and evidence for deposited Cu artefacts due to acoustic effects.

Details

Circuit World, vol. 42 no. 3
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 1 April 2014

Robert W. Kay, Gerard Cummins, Thomas Krebs, Richard Lathrop, Eitan Abraham and Marc Desmulliez

Wafer-level stencil printing of a type-6 Pb-free SAC solder paste was statistically evaluated at 200 and 150 μm pitch using three different stencil manufacturing technologies…

184

Abstract

Purpose

Wafer-level stencil printing of a type-6 Pb-free SAC solder paste was statistically evaluated at 200 and 150 μm pitch using three different stencil manufacturing technologies: laser cutting, DC electroforming and micro-engineered electroforming. This investigation looks at stencil differences in printability, pitch resolution, maximum achievable bump height, print co-planarity, paste release efficiency, and cleaning frequency. The paper aims to discuss these issues.

Design/methodology/approach

In this paper, the authors present a statistical evaluation of the impact of stencil technology on type-6 tin-silver-copper paste printing. The authors concentrate on performances at 200 and 150 μm pitch of full array patterns. Key evaluated criteria include achievable reflowed bump heights, deposit co-planarity, paste release efficiency, and frequency of stencil cleaning. Box plots were used to graphically view print performance over a range of aperture sizes for the three stencil types.

Findings

Fabrication technologies significantly affect print performance where the micro-engineered electroformed stencil produced the highest bump deposits and the lowest bump height deviation. Second in performance was the conventional electroformed, followed by the laser-cut stencil. Comparisons between the first and fifth consecutive print demonstrated no need for stencil cleaning in the case for the micro-engineered stencil for all but the smallest spacings between apertures. High paste transfer efficiencies, i.e. above 85 per cent, were achieved with the micro-engineered stencil using low aperture area ratios of 0.5.

Originality/value

Stencil technology influences the maximum reflowed solder bump heights achievable, and bump co-planarity. To date, no statistical analysis comparing the impact of stencil technology for wafer-level bumping has been carried out for pitches of 200 μm and below. This paper gives new insight into how stencil technology impacts the print performance for fine pitch stencil printing. The volume of data collected for this investigation enabled detailed insight into the limitations of the printing process and as a result for suitable design guidelines to be developed. The finding also shows that the accepted industry guidelines on stencil design developed by the surface mount industry can be broken if the correct stencil technology is selected, thereby increasing the potential application areas of stencil printing.

Details

Soldering & Surface Mount Technology, vol. 26 no. 2
Type: Research Article
ISSN: 0954-0911

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Article
Publication date: 14 March 2018

Alaaldeen Al-Halhouli, Hala Qitouqa, Abdallah Alashqar and Jumana Abu-Khalaf

This review paper aims to introduce the inkjet printing as a tool for fabrication of flexible/wearable sensors. It summarizes inkjet printing techniques including various modes of…

2647

Abstract

Purpose

This review paper aims to introduce the inkjet printing as a tool for fabrication of flexible/wearable sensors. It summarizes inkjet printing techniques including various modes of operation, commonly used substrates and inks, commercially available inkjet printers and variables affecting the printing process. More focus is on the drop-on-demand printing mode, a strongly considered printing technique for patterning conductive lines on flexible and stretchable substrates. As inkjet-printed patterns are influenced by various variables related to its conductivity, resistivity, durability and dimensions of printed patterns, the main printing parameters (e.g. printing multilayers, inks sintering, surface treatment, cartridge specifications and printing process parameters) are reported. The embedded approaches of adding electronic components (e.g. surface-mounted and optoelectronic devices) to the stretchable circuit are also included.

Design/methodology/approach

In this paper, inkjet printing techniques for fabrication of flexible/stretchable circuits will be reviewed. Specifically, the various modes of operation, commonly used substrates and inks and variables affecting the printing process will be presented. Next, examples of inkjet-printed electronic devices will be demonstrated. These devices will be compared to their rigid counterpart in terms of ease of implementation and electrical behavior for wearable sensor applications. Finally, a summary of key findings and future research opportunities will be presented.

Findings

In conclusion, it is evident that the technology of inkjet printing is becoming a competitor to traditional lithography fabrication techniques, as it has the advantage of being low cost and less complex. In particular, this technique has demonstrated great capabilities in the area of flexible/stretchable electronics and sensors. Various inkjet printing methods have been presented with emphasis on their principle of operation and their commercial availability. In addition, the components of a general inkjet printing process have been discussed in details. Several factors affect the resulting printed patterns in terms of conductivity, resistivity, durability and geometry.

Originality/value

The paper focuses on flexible/stretchable optoelectronic devices which could be implemented in stretchable circuits. Furthermore, the importance and challenges related to printing highly conductive and highly stretchable lines, as well as reliable electronic devices, and interfacing them with external circuitry for power transmission, data acquisition and signal conditioning have been highlighted and discussed. Although several fabrication techniques have been recently developed to allow patterning conductive lines on a rubber substrate, the fabrication of fully stretchable wearable sensors remains limited which needs future research in this area for the advancement of wearable sensors.

Details

Sensor Review, vol. 38 no. 4
Type: Research Article
ISSN: 0260-2288

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Article
Publication date: 1 March 2005

G.J. Jackson, M.W. Hendriksen, R.W. Kay, M. Desmulliez, R.K. Durairaj and N.N. Ekere

The study investigates the sub process behaviour in stencil printing of type‐6 and type‐7 particle size distribution (PSD) Pb‐free solder pastes to assess their printing limits.

554

Abstract

Purpose

The study investigates the sub process behaviour in stencil printing of type‐6 and type‐7 particle size distribution (PSD) Pb‐free solder pastes to assess their printing limits.

Design/methodology/approach

Two solder pastes were used in a design of experiments approach to find optimal printing parameters

Findings

Solder paste printing has been achieved to ultimately produce 30 μm deposits at 60 μm pitch for full area array patterns using a type‐7 Pb‐free solder paste. For a type‐6 PSD solder paste, full area array printing was limited to 50 μm deposits at 110 μm pitch. However, for peripheral printing patterns, 50 μm deposits at 90 μm pitch were obtained. The disparities in the behaviour of the two paste types at different geometries can be attributed to differences in the sub‐processes of the stencil printing. The paste release of the type‐6 paste from the stencil apertures at fine pitch was superior to the type‐7 paste, which may be attributed to the finer particle paste producing an increased drag force along the stencil aperture walls. However, the type‐7 paste was able to fill the smallest aperture openings, ultimately to 30 μm, thus producing full array printing patterns at uniquely small pitches.

Practical implications

This advancement in the stencil printing process has been made possible by refinements to both solder paste design and stencil manufacturing technology. Adjustments in the solder paste rheology have enabled successful printing at ultra fine pitch geometries. This, together with selecting appropriate printing parameters such as printing speed, pressure, print gap and separation speed, allows a practical printing process window. Moreover, advancements in stencil fabrication methods have produced “state‐of‐the‐art” stencils exhibiting very precisely defined aperture shapes, with smooth walls at very fine pitch, thus allowing for improved solder paste release at very small dimensions.

Originality/value

The results can be used to present a low cost solution for Pb‐free flip chip wafer bumping. Furthermore, the results indicate that type‐6 and type‐7 solder pastes should be applied to/selected for specific application geometries.

Details

Soldering & Surface Mount Technology, vol. 17 no. 1
Type: Research Article
ISSN: 0954-0911

Keywords

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Article
Publication date: 3 February 2012

Robert Kay and Marc Desmulliez

The purpose of this paper is to present a detailed overview of the current stencil printing process for microelectronic packaging.

1318

Abstract

Purpose

The purpose of this paper is to present a detailed overview of the current stencil printing process for microelectronic packaging.

Design/methodology/approach

This paper gives a thorough review of stencil printing for electronic packaging including the current state of the art.

Findings

This article explains the different stencil technologies and printing materials. It then examines the various factors that determine the outcome of a successful printing process, including printing parameters, materials, apparatus and squeegees. Relevant technical innovations in the art of stencil printing for microelectronics packaging are examined as each part of the printing process is explained.

Originality/value

Stencil printing is currently the cheapest and highest throughput technique to create the mechanical and electrically conductive connections between substrates, bare die, packaged chips and discrete components. As a result, this process is used extensively in the electronic packaging industry and therefore such a review paper should be of interest to a large selection of the electronics interconnect and assembly community.

Details

Soldering & Surface Mount Technology, vol. 24 no. 1
Type: Research Article
ISSN: 0954-0911

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Article
Publication date: 6 February 2017

Peter Lukacs, Alena Pietrikova, Beata Ballokova, Dagmar Jakubeczyova and Ondrej Kovac

This paper aims to find the optimal deposition conditions for achieving the homogenous structure of the silver layers onto three types of polymeric substrates as well as on the…

369

Abstract

Purpose

This paper aims to find the optimal deposition conditions for achieving the homogenous structure of the silver layers onto three types of polymeric substrates as well as on the rigid substrates. For this reason, the detailed investigation of the silver-based layers deposited at different technological conditions by microscopic methods is presented in this paper.

Design/methodology/approach

The special test pattern has been designed and deposited at different substrate temperatures by using two types of generally available silver-based nano-inks. Cross-sections and 3D profiles of the deposited silver layers have been profoundly analysed by using the optical profiler Sensofar S Neox on the generally used polymeric (PI, PET and PEN) and rigid substrates (951 and 9K7 LTCC, glass and alumina).

Findings

The results prove the strong correlation between the substrate temperature during the deposition process and the final shape of the created structure which has the a direct impact on the layers’ homogeneity. The results also prove the theory of the coffee ring effect creation in the inkjet printing technology.

Originality/value

The main benefit of this paper lies in the possibility of the homogeneity achievement of the deposited silver-based layers on the several polymeric and rigid substrates by managing the temperature during the deposition. The paper also offers the comparative study of nano-inks’ behaviour on several polymeric and rigid substrates.

Details

Circuit World, vol. 43 no. 1
Type: Research Article
ISSN: 0305-6120

Keywords

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Article
Publication date: 6 February 2009

Stoyan Stoyanov, Chris Bailey and Marc Desmulliez

This paper aims to present an integrated optimisation‐modelling computational approach for virtual prototyping that helps design engineers to improve the reliability and…

421

Abstract

Purpose

This paper aims to present an integrated optimisation‐modelling computational approach for virtual prototyping that helps design engineers to improve the reliability and performance of electronic components and systems through design optimisation at the early product development stage. The design methodology is used to identify the optimal design of lead‐free (Sn3.9Ag0.6Cu) solder joints in fine‐pitch copper column bumped flip‐chip electronic packages.

Design/methodology/approach

The design methodology is generic and comprises numerical techniques for computational modelling (finite element analysis) coupled with numerical methods for statistical analysis and optimisation. In this study, the integrated optimisation‐modelling design strategy is adopted to prototype virtually a fine‐pitch flip‐chip package at the solder interconnect level, so that the thermal fatigue reliability of the lead‐free solder joints is improved and important design rules to minimise the creep in the solder material, exposed to thermal cycling regimes, are formulated. The whole prototyping process is executed in an automated way once the initial design task is formulated and the conditions and the settings for the numerical analysis used to evaluate the flip‐chip package behaviour are specified. Different software modules that incorporate the required numerical techniques are used to identify the solution of the design optimisation problem related to solder joints reliability optimisation.

Findings

For fine‐pitch flip‐chip packages with copper column bumped die, it is found that higher solder joint volume and height of the copper column combined with lower copper column radius and solder wetting around copper column have a positive effect on the thermo‐mechanical reliability.

Originality/value

The findings of this research provide design rules for more reliable lead‐free solder joints for copper column bumped flip‐chip packages and help to establish further the technology as one of the viable routes for flip‐chip packaging.

Details

Soldering & Surface Mount Technology, vol. 21 no. 1
Type: Research Article
ISSN: 0954-0911

Keywords

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Article
Publication date: 21 December 2022

Vimal Kumar Deshmukh, Mridul Singh Rajput and H.K. Narang

The purpose of this paper is to present current state of understanding on jet electrodeposition manufacturing; to compare various experimental parameters and their implication on…

217

Abstract

Purpose

The purpose of this paper is to present current state of understanding on jet electrodeposition manufacturing; to compare various experimental parameters and their implication on as deposited features; and to understand the characteristics of jet electrodeposition deposition defects and its preventive procedures through available research articles.

Design/methodology/approach

A systematic review has been done based on available research articles focused on jet electrodeposition and its characteristics. The review begins with a brief introduction to micro-electrodeposition and high-speed selective jet electrodeposition (HSSJED). The research and developments on how jet electrochemical manufacturing are clustered with conventional micro-electrodeposition and their developments. Furthermore, this study converges on comparative analysis on HSSJED and recent research trends in high-speed jet electrodeposition of metals, their alloys and composites and presents potential perspectives for the future research direction in the final section.

Findings

Edge defect, optimum nozzle height and controlled deposition remain major challenges in electrochemical manufacturing. On-situ deposition can be used as initial structural material for micro and nanoelectronic devices. Integration of ultrasonic, laser and acoustic source to jet electrochemical manufacturing are current trends that are promising enhanced homogeneity, controlled density and porosity with high precision manufacturing.

Originality/value

This paper discusses the key issue associated to high-speed jet electrodeposition process. Emphasis has been given to various electrochemical parameters and their effect on deposition. Pros and cons of variations in electrochemical parameters have been studied by comparing the available reports on experimental investigations. Defects and their preventive measures have also been discussed. This review presented a summary of past achievements and recent advancements in the field of jet electrochemical manufacturing.

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