C. Andersson, B. Vandevelde, C. Noritake, P. Sun, P.E. Tegehall, D.R. Andersson, G. Wetter and J. Liu
The purpose of this paper is to assess the effect of different temperature cycling profiles on the reliability of lead‐free 388 plastic ball grid array (PBGA) packages and to…
Abstract
Purpose
The purpose of this paper is to assess the effect of different temperature cycling profiles on the reliability of lead‐free 388 plastic ball grid array (PBGA) packages and to deeply understand crack initiation and propagation.
Design/methodology/approach
Temperature cycling of Sn‐3.8Ag‐0.7Cu PBGA packages was carried out at two temperature profiles, the first ranging between −55°C and 100°C (TC1) and the second between 0°C and 100°C (TC2). Crack initiation and propagation was analyzed periodically and totally 7,000 cycles were run for TC1 and 14,500 for TC2. Finite element modeling (FEM), for the analysis of strain and stress, was used to corroborate the experimental results.
Findings
The paper finds that TC1 had a characteristic life of 5,415 cycles and TC2 of 14,094 cycles, resulting in an acceleration factor of 2.6 between both profiles. Cracks were first visible for TC1, after 2,500 cycles, and only after 4,000 cycles for TC2. The crack propagation rate was faster for TC1 compared to TC2, and faster at the package side compared to the substrate side. The difference in crack propagation rate between the package side and substrate side was much larger for TC1 compared to TC2. Cracks developed first at the package side, and were also larger compared to the substrate side. The Cu tracks on the substrate side affected the crack propagation sites and behaved as SMD. All cracks propagated through the solder and crack propagation was mainly intergranular. Crack propagation was very random and did not follow the distance to neutral point (DNP) theory. FEM corroborated the experimental results, showing both the same critical location of highest creep strain and the independence of DNP.
Originality/value
Such extensive work on the reliability assessment of Pb‐free 388 PBGA packages has never been performed. This work also corroborates the results from other studies showing the difference in behavior between Pb‐free and Pb‐containing alloys.
Details
Keywords
Stijn Vandevelde, Freya Vander Laenen, Benjamin Mine, Eric Maes, Lana De Clercq, Lies Deckers and Wouter Vanderplasschen
This paper aims to report the findings of an evaluation study concerning the Central Registration Points (CRPs) for drug users in Belgian prisons. CRPs support drug users to link…
Abstract
Purpose
This paper aims to report the findings of an evaluation study concerning the Central Registration Points (CRPs) for drug users in Belgian prisons. CRPs support drug users to link with community-based services.
Design/methodology/approach
The study applied a multi-method approach that involved an exploratory literature review; a secondary analysis of the CRPs’ databases; a qualitative study of the perceptions of a diverse sample of stakeholders with regard to the functioning of CRPs; and a prospective registration study.
Findings
One-third of the clients never attended an outpatient or residential substance abuse service before prison entry. This illustrates that the CRPs managed to reach clients who were not previously reached by (substance abuse) treatment services. All interviewed actors emphasized the added value of the CRPs in terms of informing, contacting, motivating and referring prisoners with a substance abuse problem.
Practical implications
Based on the research findings, two issues seem to be of paramount importance in the successful practice of CRPs: the confidentiality and specific expertise on (substance abuse) treatment. Given the complex situation of drug users in prison, an independent positioning and categorical assistance with drug-specific expertise seem to be essential.
Originality/value
CRPs can be considered to be one of the “building blocks” that contribute to high-quality care and continuity of care for drugs users in detention.
Details
Keywords
Yung‐Yu Hsu, Mario Gonzalez, Frederick Bossuyt, Fabrice Axisa, Jan Vanfleteren, Bart Vandevelde and Ingrid de Wolf
The purpose of this paper is to demonstrate electromechanical properties of a new stretchable interconnect design for “fine pitch” applications in stretchable electronics.
Abstract
Purpose
The purpose of this paper is to demonstrate electromechanical properties of a new stretchable interconnect design for “fine pitch” applications in stretchable electronics.
Design/methodology/approach
A patterned metal interconnect with a zigzag shape is adhered on an elastomeric substrate. In situ home‐built electromechanical measurement is carried out by the four‐probe technique. Finite element method is used to analyze the deformation behavior of a zigzag shape interconnect under uniaxial tensile loading.
Findings
The electrical resistance remains constant until metal breakdown at elongations beyond 40 percent. There is no significant local necking in either the transverse or the thickness direction at the metal breakdown area as shown by both scanning electron microscopy micrographs and resistance measurements. Micrographs and simulation results show that a debonding occurs due to the local twisting of a metal interconnect, out‐of‐plane peeling, and strain localized at the crest of a zigzag structure.
Originality/value
In this paper, the zigzag shape is, for the first time, proven as a promising design for stretchable interconnects, especially for fine pitch applications.
Details
Keywords
W. Christiaens, T. Loeher, B. Pahl, M. Feil, B. Vandevelde and J. Vanfleteren
The purpose of this paper is to present results from the EC funded project SHIFT (Smart High Integration Flex Technologies) on the embedding in and the assembly on flex substrates…
Abstract
Purpose
The purpose of this paper is to present results from the EC funded project SHIFT (Smart High Integration Flex Technologies) on the embedding in and the assembly on flex substrates of ultrathin chips.
Design/methodology/approach
Methods to embed chips in flex include flip‐chip assembly and subsequent lamination, or the construction of a separate ultra‐thin chip package (UTCP) using spin‐on polyimides and thin‐film metallisation technology. Thinning and separation of the chips is done using a “dicing‐by‐thinning” method.
Findings
The feasibility of both chip embedding methods has been demonstrated, as well as that of the chip thinning method. Lamination of four layers of flex with ultrathin chips could be achieved without chip breakage. The UTCP technology results in a 60 μm package where also the 20 μm thick chip is bendable.
Research limitations/implications
Further development work includes reliability testing, embedding of the UTCP in conventional flex, and construction of functional demonstrators using the developed technologies.
Originality/value
Thinning down silicon chips to thicknesses of 25 μm and lower is an innovative technology, as well as assembly and embedding of these chips in flexible substrates.
Details
Keywords
Bart Vandevelde and Eric Beyne
Presents the thermo‐mechanical modelling of a new type of area array package: the flip chip on polymer stud grid array (PSGA). The objective is to optimise the material and…
Abstract
Presents the thermo‐mechanical modelling of a new type of area array package: the flip chip on polymer stud grid array (PSGA). The objective is to optimise the material and geometrical design of this PSGA package and the flip chip assembly in order to achieve the highest thermal fatigue reliability for the solder joints in this structure. A parameterised non‐linear finite element model is used to calculate the inelastic strains induced in the solder joints due to thermal cycling. The techniques of design of experiments (DOE) and response surface modelling (RSM) enhance the parameter sensitivity analysis and optimisation of the PSGA design. After the optimisation of the structure, a very high solder joint fatigue reliability of this flip chip to PSGA package has been achieved.
Details
Keywords
Z.W. Zhong, T.Y. Tee and J‐E. Luan
This paper seeks to review recent advances in wire bonding, flip chip and lead‐free solder for advanced microelectronics packaging.
Abstract
Purpose
This paper seeks to review recent advances in wire bonding, flip chip and lead‐free solder for advanced microelectronics packaging.
Design/methodology/approach
Of the 91 journal papers, 59 were published in 2005‐2007 and topics related to wire bonding, flip chip and lead‐free solder for advanced microelectronics packaging are reviewed.
Findings
Research on advanced wire bonding is continuously performed for advanced and complex applications such as stacked‐dies wire bonding, wire bonding of low‐k ultra‐fine‐pitch devices, and copper wire bonding. Owing to its many advantages, flip chip using adhesive has gained more popularity. Research on the reliability of lead‐free solder joints is being conducted world‐wide. The new challenges, solutions and new developments are discussed in this paper.
Research limitations/implications
Because of page limitation of this review paper and the large number of the journal papers available, only a brief review is conducted. Further reading is needed for more details.
Originality/value
This review paper attempts to provide introduction to recent developments and the trends in terms of the topics for advanced microelectronics packaging. With the references provided, readers may explore more deeply, focusing on a particular issue.
Details
Keywords
Chang‐Chun Lee, Kuo‐Chin Chang and Ya‐Wen Yang
Integration of Cu/low‐k interconnects into the next‐generation integrated circuit chips, particularly for devices below the 90 nm technology node, has proved necessary to meet the…
Abstract
Purpose
Integration of Cu/low‐k interconnects into the next‐generation integrated circuit chips, particularly for devices below the 90 nm technology node, has proved necessary to meet the urgent requirements of reducing RC time delay and low power consumption. Accordingly, establishment of feasible and robust packaging technology solutions in relation to the structural design, as well as material selection of the packaging components, has become increasingly important. Moreover, the nature of low‐k materials and the use of lead‐free solder greatly increases the complications in terms of ensuring enhanced packaging level reliability. The foregoing urgent issue needs to be quickly resolved while developing various advanced packages. This paper aims to focus on the issues.
Design/methodology/approach
The prediction model, especially for the fatigue life of lead‐free solder joints, combined with virtual design of experiment with factorial analysis was used to obtain the sensitivity information of selecting geometry/material parameters in the proposed low‐k flip‐chip (FC) package. Moreover, a three‐dimensional non‐linear strip finite element model associated with the two levels of specified boundary condition of global‐local technique was adopted to shorten the time of numerical calculation, as well as to give a highly accurate solution.
Findings
The results of thermal cycling in experimental testing show good agreement with the simulated analysis. In addition, the sensitivity of analysis indicates that the type of underfill material has a significant effect on the lead‐free solder joint reliability.
Originality/value
A suitable combination of concerned designed factors is suggested in this research to enhance the reliability of low‐k FC packaging with Pb‐free solder joints.
Details
Keywords
Olli Nousiaianen, Risto Rautioaho, Kari Kautio, Jussi Jääskeläinen and Seppo Leppävuori
To investigate the effect of the metallization and solder mask materials on the solder joint reliability of low temperature co‐fired ceramic (LTCC) modules.
Abstract
Purpose
To investigate the effect of the metallization and solder mask materials on the solder joint reliability of low temperature co‐fired ceramic (LTCC) modules.
Design/methodology/approach
The fatigue performance of six LTCC/PCB assembly versions was investigated using temperature cycling tests in the −40‐125°C and 20‐80°C temperature ranges. In order to eliminate fatigue cracking in the LTCC module itself, large AgPt‐metallized solder (1 mm) lands with organic or co‐fired glaze solder masks, having 0.86‐0.89 mm openings, were used. The performance of these modules was compared to that of AgPd‐metallized modules with a similar solder land structure. The joint structures were analysed using resistance measurements, scanning acoustic microscopy, SEM/EDS investigation, and FEM simulations.
Findings
The results showed that failure distributions with Weibull shape factor (β) values from 8.4 to 14.2, and characteristic life time (θ) values between 860 and 1,165 cycles were achieved in AgPt assemblies in the −40‐125°C temperature range. The primary failure mechanism was solder joint cracking, whereas the AgPd‐metallized modules suffered from cracking in the ceramic. In the milder test conditions AgPd‐metallized modules showed better fatigue endurance than AgPt‐metallized modules.
Originality/value
This paper proves that the cracking in ceramic in the harsh test condition can be eliminated almost completely by using AgPt metallization instead of AgPd metallization in the present test module structure.