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This study aims to understand the influence of megasonic (MS)-assisted agitation on printed circuit boards (PCBs) electroplated using copper (Cu) electrolyte solutions to improve plating efficiencies through enhanced ion transportation.

The impact of MS-assisted agitation on topographical properties of the electroplated surfaces was studied through a design of experiments by measuring surface roughness, which is characterised by values of the parameter Ra as measured by white light phase shifting interferometry and high-resolution scanning electron microscopy.

An increase in Ra from 400 to 760 nm after plating was recorded for an increase in acoustic power from 45 to 450 W. Roughening increased because of micro-bubble cavitation energy and was supported through direct imaging of the cavitation. Current thieving effect by the MS transducer induced low currents, leading to large Cu grain frosting and reduction in the board quality. Current thieving was negated in plating trials through specific placement of transducer. Wavy electroplated surfaces, due to surface acoustic waves, were also observed to reduce the uniformity of the deposit.

The formation of unstable transient cavitation and variation of the topology of the Cu surface are unwanted phenomena. Further plating studies using MS agitation are needed, along with fundamental simulations, to determine how the effects can be reduced or prevented.

This study can help identify manufacturing settings required for high-quality MS-assisted plating and promote areas for further investigation, leading to the development of an MS plating manufacturing technique.

This study quantifies the topographical changes to a PCB surface in response to MS agitation and evidence for deposited Cu artefacts due to acoustic effects.

The objective of this investigation is the derivation of a mathematical model that describes the pressure characteristics of paste during the stencil printing process. This model is intended to generalise a qualitative understanding of these effects using squeegees that can be curved but otherwise are standard in design.

This is an analytical treatment of the paste behaviour from the foundations of continuity of fluid flow and shear stresses that are imparted by the squeegee blade movement.

An equation is obtained that profiles the pressure generated by the squeegee movement which, for the case of a linear squeegee, shows very good agreement with predicted pressure profiles using experimental data.

This model provides a theoretical framework for a better understanding of how to overcome the failure modes inherent in stencil printing, such as over‐ or under‐filled stencil cavities.

This is a generalisation of a previously developed mesh printing model. It goes beyond flat squeegee designs to describe the printing process when the blade and stencil are in contact. In addition, it encompasses non‐Newtonian fluid behaviour.

The purpose of this paper is to review the design and fabrication of a micro‐accelerometer to be used to measure the heart wall motion of patients who have just undergone coronary artery bypass graft (CABG) surgery. The sensor will provide a means of early warning for the medical staff of associated complications with this surgery occurring.

A feasibility paper is carried out with the use of commercially available MEMS three‐axis accelerometers. The sensors are used in animal studies during which the sensor is stitched directly to the surface of a pig's heart. A need for smaller sensors is required and these are designed in‐house and fabricated using a MEMS process. The final dimensions of the sensors are 2.5×3.5×1.4 mm in width, length and height, respectively.

The results of the feasibility studies demonstrate the viability of this type of sensor for heart wall motion measurement. It is possible to detect abnormalities, which can indicate complications associated with CABG. The sensors presented here are fabricated within the tight overall size specifications deemed necessary for this application.

This paper demonstrates an application of MEMS for implantable medical sensors.

In the UK, approximately 300,000 people have a heart attack each year. One of the most common surgeries that is used to treat this is CABG. This sensor is to be used by the medical staff in post‐surgery to provide “real‐time” monitoring of the heart and give early warning of regional cardiac ischemia which can save lives and reduce hospital waiting times and costs.

This paper demonstrates an original way of measuring heart wall motion. Results from the feasibility studies have proven that this can provide an invaluable way of providing early warning of complications after heart surgery.

The purpose of this paper is to present an exhaustive review of research studies and activities in the inkjet printing of conductive materials.

This paper gives a detailed literature survey of research carried out in inkjet printing of conductive materials.

This article explains the inkjet printing process and the various types of conductive inks. It then examines the various factors that affect the quality of inkjet printed interconnects such as printing parameters, materials and substrate treatments. Methods of characterising both the inkjet printing process and the electrical properties of printed conductive materials are also presented. Finally relevant applications of this technology are described.

Inkjet printing is currently one of the cheapest direct write techniques for manufacturing. The use of this technique in electronic manufacturing, where interconnects and other conductive features are required is an area of increasing relevance to the fields of electronics manufacturing, packaging and assembly. This review paper would therefore be of great value and interest to this community.

High‐frequency transducer arrays that can operate at frequencies above 30 MHz are needed for high‐resolution medical ultrasound imaging. The fabrication of such devices is challenging not only because of the fine‐scale piezocomposite fabrication typically required but also because of the small size of arrays and their interconnects. The purpose of this paper is to present an overview of research to develop solutions for several of the major problems in high‐frequency ultrasound array fabrication.

Net‐shape 1‐3 piezocomposites operating above 40 MHz are developed. High‐quality surface finishing makes photolithographic patterning of the array electrodes on these fine scale piezocomposites possible, thus establishing a fabrication methodology for high‐frequency kerfless ultrasound arrays.

Structured processes are developed and prototype components are made with them, demonstrating the viability of the selected fabrication approach. A 20‐element array operating at 30 MHz is patterned and characterised. Furthermore, an electrode pattern suitable for a 20‐element array operating at 100 MHz is created to demonstrate the state of the art of photolithography processing directly on piezocomposite.

The work reported suggests that ultrasound arrays for real‐time biomedical imaging will be viable at higher frequencies than presently available commercially or previously reported in the research literature.

The main elements of a novel, fully mask‐based process for high‐frequency ultrasound transducer array fabrication are presented in outline in this paper.

This paper aims to present an integrated optimisation‐modelling computational approach for virtual prototyping that helps design engineers to improve the reliability and performance of electronic components and systems through design optimisation at the early product development stage. The design methodology is used to identify the optimal design of lead‐free (Sn3.9Ag0.6Cu) solder joints in fine‐pitch copper column bumped flip‐chip electronic packages.

The design methodology is generic and comprises numerical techniques for computational modelling (finite element analysis) coupled with numerical methods for statistical analysis and optimisation. In this study, the integrated optimisation‐modelling design strategy is adopted to prototype virtually a fine‐pitch flip‐chip package at the solder interconnect level, so that the thermal fatigue reliability of the lead‐free solder joints is improved and important design rules to minimise the creep in the solder material, exposed to thermal cycling regimes, are formulated. The whole prototyping process is executed in an automated way once the initial design task is formulated and the conditions and the settings for the numerical analysis used to evaluate the flip‐chip package behaviour are specified. Different software modules that incorporate the required numerical techniques are used to identify the solution of the design optimisation problem related to solder joints reliability optimisation.

For fine‐pitch flip‐chip packages with copper column bumped die, it is found that higher solder joint volume and height of the copper column combined with lower copper column radius and solder wetting around copper column have a positive effect on the thermo‐mechanical reliability.

The findings of this research provide design rules for more reliable lead‐free solder joints for copper column bumped flip‐chip packages and help to establish further the technology as one of the viable routes for flip‐chip packaging.

Wafer-level stencil printing of a type-6 Pb-free SAC solder paste was statistically evaluated at 200 and 150 μm pitch using three different stencil manufacturing technologies: laser cutting, DC electroforming and micro-engineered electroforming. This investigation looks at stencil differences in printability, pitch resolution, maximum achievable bump height, print co-planarity, paste release efficiency, and cleaning frequency. The paper aims to discuss these issues.

In this paper, the authors present a statistical evaluation of the impact of stencil technology on type-6 tin-silver-copper paste printing. The authors concentrate on performances at 200 and 150 μm pitch of full array patterns. Key evaluated criteria include achievable reflowed bump heights, deposit co-planarity, paste release efficiency, and frequency of stencil cleaning. Box plots were used to graphically view print performance over a range of aperture sizes for the three stencil types.

Fabrication technologies significantly affect print performance where the micro-engineered electroformed stencil produced the highest bump deposits and the lowest bump height deviation. Second in performance was the conventional electroformed, followed by the laser-cut stencil. Comparisons between the first and fifth consecutive print demonstrated no need for stencil cleaning in the case for the micro-engineered stencil for all but the smallest spacings between apertures. High paste transfer efficiencies, i.e. above 85 per cent, were achieved with the micro-engineered stencil using low aperture area ratios of 0.5.

Stencil technology influences the maximum reflowed solder bump heights achievable, and bump co-planarity. To date, no statistical analysis comparing the impact of stencil technology for wafer-level bumping has been carried out for pitches of 200 μm and below. This paper gives new insight into how stencil technology impacts the print performance for fine pitch stencil printing. The volume of data collected for this investigation enabled detailed insight into the limitations of the printing process and as a result for suitable design guidelines to be developed. The finding also shows that the accepted industry guidelines on stencil design developed by the surface mount industry can be broken if the correct stencil technology is selected, thereby increasing the potential application areas of stencil printing.

Nano‐imprint forming (NIF) is a manufacturing technology capable of achieving high resolution, low‐cost and high‐throughput fabrication of fine nano‐scale structures and patterns. The purpose of this paper is to use modelling technologies to simulate key process steps associated with the formation of patterns with sub‐micrometer dimensions and use the results to define design rules for optimal imprint forming process.

The effect of a number of process and pattern‐related parameters on the quality of the fabricated nano‐structures is studied using non‐linear finite element analysis. The deformation process of the formable material during the mould pressing step is modelled using contact analysis with large deformations and temperature dependent hyperelastic material behaviour. Finite element analysis with contact interfaces between the mould and the formable material is utilised to study the formation of mechanical, thermal and friction stresses in the pattern.

The imprint pressure, temperature and the aspect ratio of grooves which define the pattern have significant effect on the quality of the formed structures. The optimal imprint pressure for the studied PMMA is identified. It is found that the degree of the mould pattern fulfilment as function of the imprint pressure is non‐linear. Critical values for thermal mismatch difference in the CTE between the mould and the substrate causing thermally induced stresses during cooling stage are evaluated. Regions of high stresses in the pattern are also identified.

Design rules for minimising the risk of defects such as cracks and shape imperfections commonly observed in NIF‐fabricated nano‐structures are presented. The modelling approach can be used to provide insights into the optimal imprint process control. This can help to establish further the technology as a viable route for fabrication of nano‐scale structures and patterns.

The purpose of this paper is to present a detailed overview of the current stencil printing process for microelectronic packaging.

This paper gives a thorough review of stencil printing for electronic packaging including the current state of the art.

This article explains the different stencil technologies and printing materials. It then examines the various factors that determine the outcome of a successful printing process, including printing parameters, materials, apparatus and squeegees. Relevant technical innovations in the art of stencil printing for microelectronics packaging are examined as each part of the printing process is explained.

Stencil printing is currently the cheapest and highest throughput technique to create the mechanical and electrically conductive connections between substrates, bare die, packaged chips and discrete components. As a result, this process is used extensively in the electronic packaging industry and therefore such a review paper should be of interest to a large selection of the electronics interconnect and assembly community.

The purpose of this paper is to review traditional hermeticity test methods when applied to typical micro‐electro‐mechanical systems (MEMS) cavity volumes and to propose potential solutions.

Standards for traditional testing have been applied to typical MEMS cavity volumes and the resulting issues of range and sensitivity discussed. In situ test structures have been designed and fabricated with access to the internal cavities to allow characterisation of the structures as a function of pressure.

The ultra low leak rates necessary to guarantee hermeticity of MEMS cannot be measured using traditional methods. Optical test methods are possible although in situ test structures currently provide the greatest sensitivity. A portfolio of test techniques is required to allow accurate hermeticity testing of MEMS.

This paper provides a starting point for further investigation into several methods of MEMS hermeticity testing.

This paper provides a review of the limitations of traditional testing and proposals for future testing as the trend towards smaller volume packaging continues.