SIGNAL DELAY FOR GENERALLY INTERCONNECTED DISTRIBUTED STRUCTURES

Abstract

A network composed by RC distributed parameter lines with resistively grounded nodes is considered. Upper and lower bounds for the transient voltages are inferred. The results are of interest for the signal delay evaluation in VLSI interconnections. A numerical example is presented.

Citation

MARINOV, C.A. and SANTANEN, J. (1992), "SIGNAL DELAY FOR GENERALLY INTERCONNECTED DISTRIBUTED STRUCTURES", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 11 No. 4, pp. 537-544. https://doi.org/10.1108/eb010114