Abstract
Purpose
This paper aims to investigate voiding phenomena in solder joints under thermal pads of light-emitting diodes (LEDs) assembled in mass production environment by reflow soldering by using seven low-voiding lead-free solder pastes.
Design/methodology/approach
The solder pastes investigated are of SAC305 type, Innolot type or they are especially formulated by the manufacturers on the base of (SnAgCu) alloys with addition of some alloying elements such as Bi, In, Sb and Ti to provide low-void contents. The SnPb solder paste – OM5100 – was used as a benchmark. The solder paste coverage of LED solder pads was chosen as a measure of void contents in solder joints because of common usage of this parameter in industry practice.
Findings
It was found that the highest coverage and, related to it, the least void contents are in solder joints formed with the pastes LMPA-Q and REL61, which are characterized by the coverage of mean value 93.13% [standard deviation (SD) = 2.72%] and 92.93% (SD = 2.77%), respectively. The void diameters reach the mean value equal to 0.061 mm (SD = 0.044 mm) for LMPA-Q and 0.074 mm (SD = 0.052 mm) for REL61. The results are presented in the form of histograms, plot boxes and X-ray images. Some selected solder joints were observed with 3D computer tomography.
Originality/value
The statistical analyses are carried out on the basis of 2D X-ray images with using Origin software. They enable to compare features of various solder pastes recommended by manufacturers as low voiding. The results might be useful for solder paste manufacturers or electronic manufacturing services.
Keywords
Citation
Dziurdzia, B., Sobolewski, M., Mikołajek, J. and Wroński, S. (2020), "Low-voiding solder pastes in LED assembly", Soldering & Surface Mount Technology, Vol. 32 No. 4, pp. 201-217. https://doi.org/10.1108/SSMT-11-2019-0041
Publisher
:Emerald Publishing Limited
Copyright © 2020, Barbara Dziurdzia, Maciej Sobolewski, Janusz Mikołajek and Sebastian Wroński.
License
Published by Emerald Publishing Limited. This article is published under the Creative Commons Attribution (CC BY 4.0) licence. Anyone may reproduce, distribute, translate and create derivative works of this article (for both commercial and non-commercial purposes), subject to full attribution to the original publication and authors. The full terms of this licence may be seen at http://creativecommons.org/licences/by/4.0/legalcode
1. Introduction
The implementation of Restriction of Hazardous Substances Directive 2002/95/EC (RoHS1) in 2006 and afterwards its extension as RoHS2 2011/65/EU in 2013 forced electronic industry to look for alternatives of tin-lead eutectic alloy Sn37Pb, which had been used for soldering for decades. Tin copper (SnCu), tin silver (SnAg) and tin silver copper (SnAgCu or SAC) were the dominate candidates for replacement. Finally, SAC system alloys had been chosen as the primary lead-free solders for attaching electronic devices to printed circuit boards (PCBs). The near eutectic ternary alloy Sn3.0Ag0.05Cu (SAC305) of melting temperature in the range 217°C-219°C was recommended by the IPC Solder Value Product Council as the preferred option for surface mount technology assembly. Some industries also adopted other SAC alloys such as Sn3.8Ag0.7Cu (SAC387) and Sn4.0Ag0.5Cu (SAC405), which were eutectic ternary alloys with single melting point at 217°C, but they were more expensive because of the higher silver content (Weng, 2017). The solder alloys containing 3-4Wt.% belong to the group of high-Ag bearing alloys. Very soon, after the mass adoption of SAC305 alloy as Pb-free solder of choice, the price of Ag and in turn, SAC305 increased rapidly. Additionally, the users noticed that SAC305 exhibits some limitations concerning the reliability, especially degradation of mechanical properties when exposed to elevated temperatures and during aging, fragility of solder joints in drop/shock testing, intensive tin whisker formation and voiding formation. The industry started to look for the next generation of alloys to mitigate the high cost and to improve reliability of solder joints especially those operating in harsh environmental conditions and in life-saving applications. There are five driving trends of lead-free alloy development:
low-silver SAC alloys;
low-silver SAC alloys with addition of micro-alloy elements Bi, Sb, Ni, In, Ge and Mg;
innolot alloys;
silver-free alloys Sn-X, where X = Bi, Cu, Sb and Ni; and
low-temperature solder alloys with bismuth (Bi).
The evolution of Pb-free solder alloys started from lowering the silver content in conventional high-silver bearing SACs that resulted in deterioration of thermal fatigue performance of solder joints (Samiappan, 2013). The solution was to add some micro-alloy elements such as Bi, Sb, Ni, In, Ge and Mg into low-silver SAC alloys to enhance the strength of solder joints (Sun and Zhang, 2015; Pandher et al., 2007). Robust Pb-free alloys for automotive industries commercially called Innolot were formed (Collins et al., 2016; Miric, 2010). SnCu alloys with or without dopants (Ni, Ge, Co and Bi) and containing no Ag were considered as the possible replacement of SAC-based solders. Within these solders, for example, SN100C was used in wave-soldering processes when the trade-off between the reliability and other benefits has been considered (Seelig et al., 2013). Low-temperature lead-free solder alloys containing tin-bismuth and tin-bismuth-silver were developed for assembly of cell phones, tablets and mobile computers where temperature-sensitive components and boards are used. Because of the requirements of decreasing size of such devices and demands for their low z-height stack-up, ultrathin flip-chip ball grid arrays (FCBGAs) have been used in their assembly. The use of low-temperature solder pastes of the Bi-Sn metallurgical system enabled to mitigate the warpage of FCBGA components on circuit boards at peak reflow temperatures (Cheng et al., 2017; Mokler et al., 2016).
There are many papers available describing developments of Pb-free solders with the objective to fulfill the expectations of the users.
Skwarek et al. (2018) investigate the solder joints of Innolot and eutectic SnBi alloys on direct-bonded Cu substrates in terms of mechanical strength, void content and microstructure of solder connections. The solder joints made of Innolot Alpha CVP-390 and Amtech NC-31 were subjected to thermal shock tests and afterwards the shear strength of joints was measured. The microstructure of solder joints and void detection were tested using two-dimensional (2D) and three-dimensional (3D) X-ray images. It was found that the number of voids is not related directly to the mechanical strength of the solder joints.
Teliszewski (2019) describes the development and testing procedure of a new lead-free low-melting point alloy with Bi addition, which is named Q alloy. The author describes how the prototype of alloy was performed on the basis of annealing tests and microstructure analysis and elongation tests. After new alloy formation, it was subjected to further tests such as thermal cycling, shear force and vibration and mechanical shock.
Raypah et al. (2018) investigate thermal, optical and chromatic characteristics of ThinGaN light-emitting diodes (LEDs) assembled with different solder pastes on SinkPAD substrates. Three types of solder pastes were used: no-clean SAC305, water-washable SAC305 and no-clean Sn42/Bi57.6/Ag0.4. The thermal transient technique by T3Ster device was used to determine LED thermal parameters. The findings showed that the thermal and optical performances of the LED assembled with no-clean SAC305 were better than water-washable SAC305. Thermal performance of the LED assembled with Sn42/Bi57.6/Ag0.4 was worse than that of the others. This was attributed to the lower thermal conductivity of Sn42/Bi57.6/Ag0.4 compared to the SAC305 solder material. Additionally, the authors analysed void content in solder joints under center and terminal pads of LEDs assembled with earlier mentioned three pastes. It turned out that the highest voids per cent was for water-washable SAC305 and the lowest was for no-clean Sn42/Bi57.6/Ag0.4.
O’Neill (2017) writes that high reliability requirements and increased power density in modern miniature electronic circuits are exposing various deficiencies in SAC305 alloy. The degradation of the mechanical properties of SAC305 when exposed to elevated temperatures is the solder deficiency which is important for LED and automotive electronics users. SAC305 resistance to deformation decreases to half with exposure to elevated temperatures. The loss of strength and durability of the alloy exposed to high temperature is because of a change in the microstructure of the alloy. SAC alloys containing 3% or more silver are considered as “high silver” and exhibit inconsistency called silver platelet formation. The micro cracks can propagate easily along the interface between a platelet and a bulk alloy. The remedy for this failure is to reduce silver content in the alloy. New alloys have been developed with addition of a variety of elements to improve thermal fatigue resistance and mechanical strength of SAC alloys.
One of the phenomena related to the technology of soldering are voids. Voids appear more frequently in lead-free solder joints than in tin-lead ones. Voids are considered as defects and PCB assemblers strive to minimize voids, although a certain amount of voids seems to be inevitable.
There are many different types of voids which can be differentiated with respect to how they are formed and where they are located in a solder joint (Aspandiar, 2006). The most common are micro voids, which are of diameters in the range from 100 to 300 μm. They are generated by evolution of volatile compounds from the ingredients of the solder paste and from the gaseous reduction of metallic oxides on the surfaces being soldered during the soldering process, so they are known as process voids. Planar micro voids also called “champagne” voids are generally smaller than 25 μm and they are located relatively in the same plane within a solder joint just above the intermetallic layer (IMC). They are associated with surface finish or surface contamination of solder pads. Intermetallic micro voids or Kirkendall voids are located between the intermetallic layer and a copper substrate. They are caused by differences in diffusion rates between Cu and Sn. They do not form immediately after the soldering process but after aging at high temperatures or during temperature cycling of the solder joints. These voids can affect solder joint reliability, especially when brittle fracture of intermetallic layers (IMC) are formed during drop or mechanical shocks applied to the solder joint. Other types of voids are shrinkage voids, micro-via voids, pinhole voids and they are described in many papers (Bušek et al., 2016; Ribas et al., 2017).
Formation of voids during reflow has been influenced by many factors such as the type of solder paste used, stencil aperture, PCB surface finish, reflow profile, methods of soldering and others.
Hirman and Steiner (2017) and Mallik and Njoku (2015) describe impact of solder paste selection on void formation during soldering processes. Solder pastes with flux chemistry designed for the higher preheats and peak temperatures as well as the ones comprising resins and activators, which decompose at higher temperatures characteristic for the lead-free soldering, are recommended.
Bušek et al. (2016) add small amounts of additional fluxes to solder pastes which have their inherent flux ROL0 and come to the conclusion that the addition of even small amount of flux of high activity contribute to lower voiding. They also emphasize the role of solvents in void formation.
Previti et al. (2010) achieved void reduction by optimizing a reflow profile – prolonging the preheat time and the time above liquidus (TAL). O’Neill and Seelig (2016) find that for the bottom-terminated components (BTC), the lowest voiding performance was obtained with lower peak temperatures and shorter TAL. Herron et al. (2011) and Qu (2011) investigate the effective voiding control through various solder-mask patterning. For components with large solder pads, it is recommended to divide them into smaller subpads. Bernard and Bryant (2004) describe the effect of PCB pad finish on voiding and suggests that immersion tin, immersion silver and lead-free HASL finishes are preferential.
Ulzhöfer (2013) describes a convection reflow soldering system, in which a vacuum chamber is incorporated into a conveyor reflow oven. Molten solder is exposed to a vacuum and all gaseous inclusions are sucked off from solder joints. As a result of the convection reflow with vacuum, the average percentage of voids in the soldered joints was reduced to a mean value of less than 1%.
Dziurdzia et al. (2018) analyse statistically the distribution of voids in solder joints performed with vapour phase and convection reflow. The authors have found that using vapour phase reflow supported with vacuum decreases void contents in solder joints under LED and BGA packages. However, using the convection reflow with well-set temperature profile enables to get voiding at a level acceptable by customers at much lower manufacturing cost.
Górecki et al. (2018) and Dziurdzia et al. (2019) compare thermal parameters of LED modules mounted on metal cladded PCBs by using two soldering techniques – convection reflow and vapour phase soldering. Transient thermal impedance of test samples was measured with the indirect electrical method. The research confirmed that solder joints performed with a vapour phase soldering are characterized by smaller void contents and by lower thermal resistance when compared to solder joints formed with the convection reflow. Ptak et al. (2019) create a compact thermal model of LED modules in a form of an RC network and verify the experimental results of their transient thermal impedances with calculations.
Sobolewski and Dziurdzia (2019) investigate the impact of voids on thermal conductivity of a macro solder joint formed between a copper cylinder and a copper plate. Thermal conductivity was measured by using K-type thermocouples. Contents of voids were established on the basis of X-ray images of solder joints.
Biocca (2013) gives many useful advices concerning prevention of void formation in lead-free joints. Voids can not only reduce thermal performance of a component but also create a reliability issue especially in applications where the lead-free assembly will be exposed to thermal cycling or vibration. Lead-free alloys such as SAC alloys have higher surface tension than SnPb. It is important to select a solder paste which has flux designed for the higher preheats and peak temperatures and to optimize the reflow profile as to remove any volatiles by extending the preheat times and increasing the TAL. Joint geometries contribute to void formation. Leadless components have large flat solder pads at a bottom of packages. This configuration makes outgassing during reflow difficult and enhances void formation.
Lifton et al. (2018) propose the method of void content reduction under thermal pads of bottom terminated components (BTCs) and quad flat no-leads components (QFNs) by using the special preforms that limit solder paste volume under packages. Preforms, selecting specific flux amount and optimizing soldering conditions resulted in significant reduction in voiding (<10%).
Le et al. (2016) investigate, using the finite element method, effects of voids on the fatigue lifetime of solders of Innolot type (Sn-Ag3.7Cu0.65Bi3.0Sb1.43 Ni0.15) under IGBT power modules. The results suggest that the fatigue reliability of the solder joint depends on not only the location, the volume fraction but also the distribution of voids. Voids located at critical sites such as corners or borders facilitate initiation and propagation of damage. As the void percentage increases, the fatigue lifetime of the solder joint decreases.
Electronics is becoming more dense and more powerful and is being used in more harsh environments. The example is high power LEDs, the commercial applications of which have increased over the past several years because of LEDs’ high reliability, long lifetime and energy savings potential. Soldering is one of the best bonding processes for the LED packages onto the substrates. The reliability of solder joints between the LED package and a PCB decide the overall reliability of LED lighting fixtures. New alloys give assemblers new tools to meet the evolving demands of the electronics market.
The paper analyses statistically the influence of a solder paste type on voiding distribution in solder joints under high-power LEDs assembled with convection reflow in mass production environment. Void contents and void diameters have been analysed. Seven solder pastes recommended by manufacturers as low voiding and innovative at a market have been tested using 2D and 3D X-ray transmission systems. The pastes investigated belong to various group of pastes such as SAC305, SAC pastes with addition of various alloying elements, Innolot pastes and low-temperature pastes with bismuth.
2. Experimental
2.1 Processing parameters
The high-power Cree LEDs in XP-G packages were used in experiments. They were mounted on metal cladded PCBs (MCPCBs). Seven types of lead-free solder pastes – novel at a market – REL61, REL22, OM338PT, M8, OM340, CVP390 and LMPA-Q6 were used for LED soldering. The SnPb solder paste OM5100 was used as a benchmark. The pastes OM338PT and M8 are of SAC305 type, the pastes OM340 and CVP390 are of Innolot type, the pastes REL61 and REL22 are the modification of the SAC type with addition of some alloying elements such as Sb, Ni and Bi. The paste LMPA-Q6 has the special low voiding formula and is based on bismuth. Figure 1 presents the selection of pastes under investigations.
The high-power Cree LEDs are characterized by the forward voltage (at 1.500 mA, 85°C) equal to 3.1 V, reverse voltage – max 5 V and forward current – max 1.500 mA. Thermal resistance between junction to solder point is equal to 4°C/W. LED junction temperature achieves 150°C.
Cree LED chips are deposited onto ceramic substrates of dimensions 3.45 × 3.45 mm [Figure 2(a)]. There are three electrodes on the bottom side of these substrates, the cathode, the anode and the thermal electrode, which is electrically isolated but thermally connected to the LED chips. The cathode and the anode are called electrical electrodes. Thermal electrode is of dimensions 1.30 × 3.30 mm, whereas electrical electrodes are of dimensions 0.50 × 3.30 mm.
The LEDs were mounted on MCPCBs comprising an aluminum-core base layer, thin thermally conductive dielectric layer, copper-circuit layer and a solder mask. Thickness of the aluminum core, dielectric layer and copper-circuit layer were 1.5 mm, 0.100 mm and 0.035 mm, respectively. The solder pads on MCPCBs were protected with high-temperature organic solderability preservatives.
LEDs were mounted on boards consisting of ten panels. On each panel, eight Cree LEDs were soldered [Figure 2(b)]. In total, a testing sample that means a board consisted of 80 LEDs.
Soldering of LEDs on metal cladded printed circuit boards (MCPCBs) was carried out in Fideltronik Poland Ltd, Sucha Beskidzka, Poland. Solder paste printing was performed using stencil printer DEK Horizon 01X. The Siplace SX2 collect and pick machine was used to deposit LEDs on the substrate. The convection reflow soldering was carried out in a Vitrosonic Soltec oven.
2.2 Solder pastes characterization
Table 1 presents basic characteristics of pastes used in the experiment. One of them is a tin-lead paste (OM-5100) used as a reference. The rest are lead-free: SAC, Innolot type and the bismuth-based. Some of them are specially formulated for low-void contents. They are generally new in a market.
OM-5100 is the tin-lead paste of content 63Sn37Pb for fine pitch applications.
OM-338-PT and M8 are the lead-free solder pastes of typical SAC305 types.
REL61 is the lead-free solder paste, which was developed as a low cost alternative to SAC305. It has a lower melting point than SAC305 and other low/no-silver solder alloys.
REL22 is the highly reliable lead-free solder paste of SAC family that performed exceptionally durable for extremely harsh environments such as automotive or avionics/aerospace.
The pastes REL61 and REL22 were formulated on the basis of the paste M8 by replacing the SAC305 alloy by the new alloys REL61 or REL22. Both pastes have the same flux system but unique alloys. The exact content of the new alloys is not known because of patent pending procedures. The manufacturer revealed that REL61 alloy is comprises tin, bismuth, silver, copper and trace amount of grain structure refiners, whereas REL22 alloy consists of tin, bismuth, silver, copper, antimony, nickel and trace amount of grain structure refiners.
CVP390 and OM340 are the lead-free solder pastes of InnoLot™ type. Their solder composition comprises tin, silver, copper, antimony, nickel and bismuth. CVP390 differs from OM340 by the type of the solder powder. CVP390 contains the metal powder of three-type (25-45 µm) and OM340 the metal powder of four-type (20-38 µm).
LMPA-Q6 is composed of low melting point alloys on the basis of bismuth. The exact content of the paste is not available because of patent pending procedures. The low melting point of the paste allows for lower and shorter reflow profile, which results in reduced energy consumption and less stress experienced by PCBs and components.
In the pastes investigated no-clean fluxes of ROL0 or ROL1 type have been applied, as it is shown in Table 1. The pastes M8, REL61 and REL22 contain flux ROL1, whereas the rest of pastes – flux ROL0. The activity level of fluxes was classified according to IPC standards: J-STD-004A (2004) or J-STD-004B (2008). The standard J-STD-004B is the new version of the standard J-STD-004A with improved halogen tests. The paste manufacturers do not reveal the exact composition of fluxes they use for paste preparation.
The convection reflow soldering of LEDs was carried out in a Vitrosonic Soltec oven with 12 zones of heating and 4 zones of cooling. The reflow Profile 1 shown in Figure 3 was applied for processing all solder pastes except LMPA-Q6. The reflow Profile 2 used for processing LMPA-Q6 is presented in Figure 4.
The details of the reflow profiles used for processing the pastes are presented in Table 2.
Reflow was processed in the industrial environment. Reflow profiles were established on the basis of experience of Fideltronik staff and in agreement with the paste data sheets. Profile 1 was applied to all solder pastes investigated except the paste LMPA-Q6, which has the lower melting point than the rest of the pastes and requires the separate profile.
2.3 2D X-ray inspection
Voidings in solder joints were inspected with the Automatic X-ray Inspection System (AXI) at Fideltronik Poland Ltd., Sucha Beskidzka. The AXI system is equipped with the X-ray tube (sealed), which operates at 130 kV/40 W and the metal-oxide-semiconductor X-ray detector of dimensions 15 × 12 cm and 14-bit digital output. The achievable object resolution is of about 3–4 µm. The AXI software expresses void contents by means of a parameter called solder pad coverage, which is the ratio of the area wetted with solder minus total void area to the pad area derived from the data sheet of a component (Figure 5). Solder paste coverage of LED solder pads was chosen as a measure of void contents in solder joints because of common usage of this parameter in industry practice. The AXI system uses grey-level pixel analysis to find the coverage. Figures 6(b)-13(b) present 2D X-ray images of solder joints formed with various solder pastes.
After 2D X-ray analysis, the selected samples of solder joints were subjected observations with 3D X-ray tomography using Phoenix Nanotom S system in AGH Faculty of Physics and Applied Computer Science.
3. Results and discussion
3.1 Coverage of light-emitting diode thermal pads
3.1.1 Histograms: coverage of light-emitting diode thermal pads
On the basis of 2D X-ray images, the coverage of thermal pads of LEDs was determined by the software of the AXI system and the results were presented in the form of histograms and box plots. The histograms were overlaid by normal distribution curves. Additional statistical parameters such as mean and standard deviation were added to histograms.
Figures 6(a)-13(a) show histograms of counts vs thermal pad coverage for diodes assembled with convection reflow and various solder pastes. The sample of 80 LEDs was analysed to create a histogram.
Figure 6(a) presents the histogram of a thermal pad coverage for LEDs mounted with tin-lead solder paste OM5100, which is the reference paste in our experiment. The mean value of the thermal pad coverage in this case is equal to 99.1% with standard deviation SD = 0.75% that means that void contents in solder joints under thermal pads of diodes is very low at a level of 0.9%.
Among lead-free pastes, the LMPA-Q6 and REL61 show the highest mean thermal pad coverage with values 93.13% (SD = 2.72%) and 92.92% (SD = 2.77%), respectively. Both pastes have been introduced into the market just recently. LMPA-Q6 is a mixture of low-temperature alloys based on bismuth. REL61 is a new paste based on SAC alloy with addition of various alloying elements. Figures 7(a) and 8(a) show the histograms of thermal pad coverages for LEDs mounted with LMPA-Q6 and REL61, respectively.
Next in line there are solder pastes from SAC305 family: OM-338-PT and M8 with mean thermal pad coverage 91.81% (SD = 2.45%) and 91.50% (SD = 3.02%), respectively. The histograms of thermal pad coverages for LEDs mounted with OM-338-PT and M8 are included in Figures 9(a) and 10(a).
The list is closed by three solder pastes intended for operation in harsh environmental conditions REL22, OM340 and CVP390 with mean thermal pad coverage 88.02% (SD = 2.52%), 88.32% (SD = 2.70%) and 87.73% (SD = 2.58%), respectively. REL22 is a new paste based on SAC alloy with addition of various alloying elements, whereas the pastes OM340 and CVP390 are of Innolot type. The histograms of thermal pad coverages for LEDs mounted with REL22, OM340 and CVP390 are shown in Figures 11(a)-13(a).
Histograms of thermal pad coverage were overlaid with bell-shaped curves; however, further investigations showed that the data distributions are not all normal.
When we try to determine whether a collection of data has a distribution that is approximately normal, we can visually inspect a histogram to see if it is more or less bell-shaped, we can inspect a box plot, a normal probability plot or use a normality test (Triola, 2013).
The procedure for determining whether it is reasonable to assume that collected data are from a population having a normal distribution will be presented in the example of void distribution under thermal pads of LEDs soldered with LMPA-Q6 paste.
The histogram of thermal pad coverage for LEDs soldered with LMPA-Q6 paste has been already presented in Figure 7(a). Figure 14 shows a box plot (box and whisker diagram), which is a complement to the histogram and displays the distribution of data based on major percentiles such as: minimum, first quartile, median, third quartile and maximum using a box and lines.
If the first and third quartiles are symmetrical with respect to the median and mean values are seen to be located at roughly the same position near the center of the box, then we can believe that the data may be normally distributed. The configuration of a box plot in Figure 14 suggests that the distribution of voids in solder joints under thermal pads of LEDs soldered with LMPA-Q6 paste is not normal. The median is shifted right in relation to mean that indicates that the distribution curve is slightly right skewed. The outlier is marked by an asterisk in Figure 14.
Another method of checking if the data distribution is normal is to use a normality test, for example, Shapiro-Wilk test. The Shapiro-Wilk test checks the null hypothesis that a sample comes from a normally distributed population. If the probability value (p value) is less than a chosen alpha level, then the null hypothesis is rejected and there is an evidence that the data tested are not normally distributed. If the p value is greater than a chosen alpha level, then the null hypothesis cannot be rejected. Shapiro-Wilk test was carried out using origin tools for void distribution under thermal pads of LEDs soldered with LMPA-Q6 paste. The alpha level of 0.05 was chosen. The Shapiro-Wilk test revealed that for α = 0.05 is p < 0.05 that means that decision is that thermal pad coverage distribution under thermal pads of LEDs soldered with LMPA-Q6 paste is not normal.
The same statistical analysis as for the thermal pad coverage of LEDs soldered with LMPA-Q6 paste was carried for all histograms from Figures 7(a)-13(a). The results are collected in Table 3.
3.2 Box plots: coverage of LED thermal pads
Figure 15 displays box plots for coverage of thermal pads of LEDs soldered with various solder pastes investigated. In Figure 15, box plots are oriented vertically. They provide the statistical information including medians, means, ranges and outliers. The median lines inside boxes illustrate the difference between samples, the box lengths show how the data is dispersed between each sample, the length of whiskers displays the difference between the extreme values (minimum and maximum) and the outliers (asterisks) indicate data located distant from the rest of the data. Small squares inside boxes display mean values of data. When the median is moved to the one side of the box, it indicates that the distribution of data is skewed.
It can be noticed that the data distribution is slightly skewed in all cases. Taking into account the decreasing value of thermal pad coverage, the lead-free pastes can be arranged in a series: LMPA-Q6, REL61, OM338PT, M8, REL22, OM340 and CVP390. The paste OM5100 with the highest thermal pad coverage is used only as a benchmark. It can be noticed that the difference in thermal pad coverage for the pastes LMPA-Q6 and REL61 is included within the limits of statistical error.
3.2.1 Tables: coverage of LED thermal pads
Tables 3 and 4 contain the full set of statistical parameters for coverage of thermal pads of LEDs soldered with various solder pastes. Apart from mean, standard deviation, minimum, maximum and median, these tables were completed with such parameters as skewness and normality test. Skewness is a measure of the symmetry in a distribution. If skewness is greater than zero, the distribution is left skewed and we count more observations on the right side of the overlaying curve. If skewness is less than zero, the distribution is right skewed. For normal distribution, skewness is close to zero. Shapiro–Wilk test is a common normality test for small and medium sample size. In this test, the null hypothesis states that data are taken from normal distributed population.
To sum up, the largest thermal pad coverage was found for the pastes LMPA-Q6 and REL61.
The mean value of the thermal pad coverage for LMPA-Q6 is 93.13% (SD = 2.72%). The box plot encompasses the values from 86.38% (Quartile 1 – Q1) to 89.56% (Quartile 3 – Q3) that means that more than 25% and less than 75% of thermal pad coverage is included in the range from 86.38% to 89.56%. The median is 93.36%. The median is shifted right with respect to the mean – toward the upper quartile (Q3). The spread of data is included between 85.77% (min) and 97.87% (max).
The mean value of thermal pad coverage for REL61 is 92.93% (SD = 2.77%). The dispersion of the data is now wider than in the case of LMPA-Q6 and the interquartile range (IQR = Q3 − Q1) is equal to 3.18%. The difference between the thermal pad coverage for LMPA-Q6 and REL61 pastes is small and it is less than 0.2%.
The normality test revealed with high probability (95%) that void distributions in solder joints under thermal pads are normal for the pastes OM338PT, M8, REL22 and OM340 and that void distributions in solder joints under electrical pads are normal for the pastes M8 and OM340. Normal distribution of voids in a solder joint shows that the process of void formation in this solder joint is the most even.
3.3 Void diameters inspection under thermal pads of light-emitting diodes
Voids in solder joints formed with various solder pastes were examined in terms of void size under thermal pads of LEDs. Void diameters were measured with using optical tools with resolution 0.02 mm. The statistical probe consisted of 32 LEDs for each solder paste.
3.3.1 Histograms: void diameters under thermal pads
Histograms of void diameter distribution in solder joints under thermal pads of LEDs are presented in Figure 16(a)-16(h). The histograms are completed with mean and standard deviation (SD) values for each distribution.
For LMPA-Q6, the mean value of void diameters in solder joints under thermal pads of LEDs is 0.061mm (SD = 0.044mm). The median is equal to 0.042 mm. The spread of data is included between 0.021 mm (min) and 0.399 mm (max). For REL61, the mean value of void diameters in solder joints under thermal pads of LEDs is 0.074 mm (SD = 0.052 mm). The median is equal to 0.063 mm. The spread of data is included between 0.021 mm (min) and 0.567 mm (max). The voids with the lowest diameters were detected for the tin-lead paste, OM5100. For this paste, the mean value of void diameters was found as 0.045 mm (SD = 0.022 mm). The solder joints formed with the tin-lead paste are the reference joints in our experiment.
Histograms of void diameters distributions are skewed in all technological versions.
3.3.2 Box plots: void diameters under thermal pads
Figure 17 presents box plots for distribution of void diameters under thermal pads. The mean value of void diameters formed with using lead-free pastes are included in the range from 0.055mm (SD = 0.049 mm) to 0.096 mm (SD = 0.067 mm). The medians are in the range from 0.042 mm to 0.063 mm.
3.3.3 Tables: void diameters under thermal pads
Table 4 contains the statistical parameters for the distribution of void diameters under thermal pads of LEDs soldered with various solder pastes.
It can be noticed that for solder joints formed with LMPA-Q6, diameters of voids under thermal pads are smaller than diameters of voids under thermal pads in solder joints formed with REL61. The medians are 0.042 mm and 0.063 mm for LMPA-Q6 and REL61, respectively. For solder joints formed with OM338PT, REL22, CVP390 and OM340, the medians of diameters of voids under thermal pads are close to the median for REL61. For solder joints formed with tin-lead OM5100, the median of diameters of voids under thermal pads are close to the median for LMPA-Q6.
3.4 3D X-ray observations
After 2D X-ray analysis, the selected samples of solder joints were subjected to examination with 3D X-ray computer tomography using Phoenix Nanotom S system. The system is equipped with a 180 kV nanofocus tube with a maximum output power of 15 W. The system uses an X-ray spot size of diameter less than 1 μm that allows the excellent detail detectability. The software myVGL2.2.2 is used for the 3D visualization. For the purpose of analysis, the void size was differentiated into micro- and macro-voids. Micro-voids are called small voids with a diameter of up to 0.100 mm and macro-voids are large voids with a diameter of over 0.100 mm.
Figures 18-21 show 3D images of solder joints formed with the pastes LMPA-Q6, REL61, OM338PT and OM5100.
A set of images for each solder joint investigated contains a 3D view, a horizontal cross-section at a certain depth and a vertical cross-section across a thermal pad and across an electrical pad. Additional information is provided with a histogram showing a distribution of voids under thermal and electrical pads altogether for the LED investigated.
Figure 18(a)-18(c) present the image of a solder joint formed with the paste LMPAQ-6. As it can be seen there, a mix of micro-voids and macro-voids appears in a solder joint under a thermal pad. A large number of macro-voids are formed in a solder joint under electrical pads. The vertical cross-section discloses that the macro-voids under thermal pads are deep, through the whole joint. The histogram in Figure 18(b) shows that the mean value of void diameters in this test sample is 0.064 mm (SD = 0.045 mm). The most numerous are voids of diameters of about 0.051 mm. The largest voids have diameters in the range of 0.200 mm. The void diameters were measured with the ImageJ software.
Figure 19(a)-19(c) show the image of solder joints formed with the paste REL 61, where mostly macro-voids can be observed. The diameters of the largest macro-voids are of about 0.450 mm. The mean value of voids in this test sample is 0.101 mm (SD = 0.085 mm). The most numerous are voids of diameters of about 0.071 mm. The largest voids under thermal pads are through holes.
Figure 20(a)-20(c) show the images of solder joints formed with the paste OM338PT. Some macro-voids and the numerous micro-voids can be observed in solder joints under thermal pads. The mean value of voids in this test sample is 0.056 mm (SD = 0.051 mm). The most numerous are voids of diameters of about 0.036 mm. The largest voids under thermal pads are of diameters equal to 0.30 mm and they are through hole.
The solder joint presented in Figure 21(a)-21(c) is formed with the paste OM5100, which is the tin-lead paste. This solder joint contains a small amount of micro-voids both in parts under thermal and electrical pads. The mean value of voids in this test sample is 0.055 mm (SD = 0.026 mm). The most numerous are voids of diameters of about 0.05 mm. The largest voids under the thermal pad are of diameters of about 0.13 mm.
Because of the time-consuming and expensive procedure, only a selected samples were undertaken for 3D observations with computer tomography. The test samples are solder joints formed with the pastes: LMPA-Q6, REL61, OM338PT and OM5100. The computer tomography shows clear advantages compared to 2D X-ray systems. It makes possible to get more detailed information about the location of voids, their shape and distribution.
4. Conclusions
The aim of experiments was to investigate voiding phenomena in solder joints under thermal pads of high-power LEDs assembled in mass production environment by using reflow soldering and selected lead-free solder pastes. The investigated solder pastes included the pastes especially formulated for low voiding (LMPA-Q6, REL61, REL22), the typical SAC ones (OM-338PT, M8) and the ones of Innolot type (CVP-390, OM340). The tin-lead solder paste OM5100 was used as a benchmark.
The reflow process was carried out for all pastes, except LMPA-Q6, according to the same temperature profile (Profile 1) established on the basis of experience of Fideltronik staff and in agreement with the paste data sheets. The paste LMPA-Q6, which has the lower melting point than the rest of the pastes, required the separate profile (Profile 2).
Coverage of solder pads and void diameters were the subject of statistical analyses to find the impact of solder pastes on void formation. The results of analyses were presented in forms of histograms and box plots. The basis for the statistical analyses were 2D X-ray inspection. The selected test samples were observed with 3D computer tomography.
Coverage of solder pads was chosen for analyses because of common usage of this parameter in industry practice for describing void contents in solder joints. For the lead-free solder pastes investigated, the mean value of coverage was found in the range from 88.01% (SD = 2.51%) to 93.13% (SD = 2.72%) for thermal pads of LEDs. For the tin-lead solder paste, this coverage achieved mean value 99.08% (SD = 0.75%) and 96.95% (SD = 155%) for thermal pads. It was found that the highest coverage of thermal pads is achieved for the pastes LMPA-Q6 and REL61 with the mean coverage 93.13% (SD = 2.72%) and 92.93% (SD = 2.77%), respectively.
The solder joints formed under LED thermal pads with using the pastes LMPA-Q6 and REL61 were characterized by void diameters of mean value equal to 0.061 mm (SD = 0.044) and 0.074 mm (SD = 0.052), respectively.
Flux chemistry plays the important role in void formation; however, the reported experiments did not provide the clear evidence for this. In experiments, commercial pastes were used which detailed flux chemistry is a trade secret. It is known only that the fluxes were tested according to IPC standards: J-STD-004A or J-STD-004A and some pastes contain more active (ROL1) and some – less active (ROL0) flux. For the LMPA-Q6 and REL61 with the lowest level of voiding – the LMPA-Q6 contains ROL0 flux and the REL61 – ROL1 flux, so further investigations are needed to find the impact of flux activity on voiding.
We assume that the statistical analyses of void contents in solder joints formed with various solder pastes, as presented in the paper, might be useful for solder paste manufacturers as well as for electronic manufacturing services to improve technological processes.
Figures
Solder pastes (OM-5100, OM-338-PT, M8, REL61, REL22, CVP-390, OM-340, LMPA-Q6, data sheets)
No. | Symbol | Manufacturer | Type | Contents | Detailed contents | Melting point (°C) | Flux |
---|---|---|---|---|---|---|---|
1. | OM-5100 | Alpha Assembly | Tin-lead | SnPb | 63Sn37Pb | 178 | ROL0 (J-STD-004A) |
2. | OM-338-PT | Alpha Assembly | Lead-free | SAC305 | 96.5Sn3.0Ag0.5Cu | 232–250 | ROL0 (J-STD-004A) |
3. | M8 | Alpha Assembly | Lead-free | SAC305 | 96.5Sn3.0Ag0.5Cu | 217–221 | ROL1 (J-STD-004B) |
4. | REL61 | Alpha Assembly | Lead-free | SnBiAgCu | not available | 208–215 | ROL1 (J-STD-004B) |
5. | REL22 | Alpha Assembly | Lead-free | SnAgBiSbNiCu | not available | 210–212 | ROL1 (J-STD-004B) |
6. | CVP-390 | Alpha Assembly | Lead-free | Innolot | 90.95Sn3.8Ag0.7Cu1.4Sb0.15Ni3Bi | 206–218 | ROL0 (J-STD-004B) |
7. | OM-340 | Alpha Assembly | Lead-free | Innolot | 90.95Sn3.8Ag0.7Cu1.4Sb0.15Ni3Bi | 206–218 | ROL0 (J-STD-004B) |
8. | LMPA-Q6 | Interflux Electronics | Lead-free | Low temperature Bi-based | not available | 139–176 | ROL0 (J-STD-004B) |
Reflow profiles used for processing the pastes investigated
No. | Profile feature | Profile 1 used for reflow all solder pastes except LMPA-Q6 | Profile 2 used for reflow LMPA-Q6 |
---|---|---|---|
1. | Ramp-up rate | 2.2°C/s | 2°C/s |
2. | Soak time | 25 s (160°C –180°C) | 42 s (140°C–180°C) |
3. | Reflow time | 49 s (above 217°C) | 71 s (above 176°C) |
4. | Peak temperature | 239°C | 212°C |
Statistical parameters of LED thermal pad coverage distribution
No. | Parameter | OM5100 | LMPA-Q6 | REL61 | OM338PT | M8 | REL22 | CVP390 | OM340 |
---|---|---|---|---|---|---|---|---|---|
1 | Mean (%) | 99.08 | 93.13 | 92.93 | 91.81 | 91.50 | 88.01 | 87.73 | 88.31 |
2 | SD (%) | 0.75 | 2.72 | 2.77 | 2.45 | 3.02 | 2.52 | 2.58 | 2.70 |
3 | Min (%) | 93.93 | 85.77 | 81.94 | 85.68 | 83.62 | 81.98 | 78.02 | 80.53 |
4 | Max (%) | 99.83 | 97.87 | 97.77 | 96.65 | 97.00 | 93.11 | 92.12 | 94.56 |
5 | Median (%) | 99.26 | 93.51 | 93.36 | 91.83 | 91.72 | 88.11 | 88.35 | 88.65 |
6 | Skewness | −4.4335 | −0.8 | −1.2246 | −0.2713 | −0.4647 | −0.1805 | −1.0683 | −0.3493 |
7 | N total | 80 | 80 | 80 | 80 | 80 | 80 | 96 | 96 |
8 | Normality test p-value decision at level 0.05 |
Shapiro-Wilk 5.7537E-13 reject normality |
Shapiro-Wilk 0.0016 reject normality |
Shapiro-Wilk 1.9587E-4 reject normality |
Shapiro-Wilk 0.3820 cannot reject normality |
Shapiro-Wilk 0.1572 cannot reject normality |
Shapiro-Wilk 1.9587E-4 cannot reject normality |
Shapiro-Wilk 1.9588E-4 reject normality |
Shapiro-Wilk 0.6873 cannot reject normality |
Standard deviation (SD)
Statistical parameters of void diameter distribution in thermal pads of LEDs
No. | Parameter | OM5100 | LMPA-Q6 | REL61 | OM338PT | M8 | REL22 | CVP390 | OM340 |
---|---|---|---|---|---|---|---|---|---|
1 | Mean (mm) | 0.045 | 0.061 | 0.074 | 0.096 | 0.055 | 0.075 | 0.073 | 0.087 |
2 | SD (mm) | 0.022 | 0.044 | 0.052 | 0.067 | 0.049 | 0.062 | 0.056 | 0.061 |
3 | Minimum (mm) | 0.021 | 0.021 | 0.021 | 0.021 | 0.021 | 0.042 | 0.042 | 0.042 |
4 | Maximum (mm) | 0.126 | 0.399 | 0.567 | 0.420 | 0.462 | 0.525 | 0.525 | 0.42 |
5 | Mode (mm) | 0.042 | 0.042 | 0.063 | 0.063 | 0.021 | 0.042 | 0.042 | 0.042 |
6 | Median (mm) | 0.042 | 0.042 | 0.063 | 0.063 | 0.042 | 0.063 | 0.063 | 0.063 |
7 | Skewness | 1.054 | 4.135 | 2.979 | 1.909 | 3.608 | 3.711 | 4.139 | 2.564 |
8 | N total | 160 | 660 | 611 | 449 | 1,080 | 857 | 601 | 353 |
Standard deviation (SD)
References
Aspandiar, R.F. (2006), “Voids in solder joints”, SMTA Journal, Vol. 19 No. 4, pp. 28-36.
Bernard, D. and Bryant, K. (2004), Does PCB Pad Finish Affect Voiding Levels in Lead-Free Assemblies?, SMTA International, Chicago, available at: www.nordson-at.com/technology/up_img/1428049744-498509.pdf
Biocca, P. (2013), “Preventing lead-free SMT soldering defects”, SMT Magazine, pp. 68-75.
Bušek, D., Dušek, K., Růžička, D., Plaček, M., Mach, P., Urbánek, J. and Starý, J. (2016), “Flux effect on void quantity and size in soldered joints”, Microelectronics Reliability, Vol. 60, pp. 135-140.
Cheng, S., Huang, C.-M. and Pecht, M. (2017), “A review of lead-free solders for electronics applications”, Microelectronics Reliability, Vol. 75, pp. 77-95.
Collins, M.N., Dalton, E. and Punch, J. (2016), “Microstructural influences on thermomechanical fatique behaviour of third generation high Ag content Pb-free solder alloys”, Journal of Alloys and Compounds, Vol. 688, pp. 164-170.
Dziurdzia, B., Sobolewski, M. and Mikołajek, J. (2018), “Convection vs vapour phase reflow in LED and BGA assembly”, Soldering & Surface Mount Technology, Vol. 30 No. 2, pp. 87-99.
Dziurdzia, B., Górecki, K. and Ptak, P. (2019), “Influence of a soldering process on thermal parameters of large power LED modules”, IEEE Transactions on Components, Packaging and Manufacturing Technology, Vol. 9 No. 11, pp. 2160-2167.
Górecki, K., Dziurdzia, B. and Ptak, P. (2018), “The influence of a soldering manner on thermal properties of LED modules”, Soldering & Surface Mount Technology, Vol. 30 No. 2, pp. 81-86.
Herron, D. Liu, Y. and Lee, N.-C. (2011), “Effective voiding control of QFN via solder mask patterning”, SMTA Pan Pacific 2011, available at: www.smtnet.com/library/files/upload/voiding_control_at_qfn_assembly_ncl.pdf
Hirman, M. and Steiner, F. (2017), “Optimization of solder paste quantity considering the properties of solder joints”, Soldering & Surface Mount Technology, Vol. 29 No. 1, pp. 15-22.
Le, V.N., Benabou, L., Etgens, V. and Tao, Q.B. (2016), “Finite element analysis of the effect of process-induced voids on the fatigue lifetime of a lead-free solder joint under thermal cycling”, Microelectronics Reliability, Vol. 65, pp. 243-254.
Lifton, A. Salerno, P. Sidone, J. and Khaselev, O. (2018), “Novel approach to void reduction using microflux coated solder preforms”, SMT007 Magazine, pp. 54-65.
Mallik, S. and Njoku, J.E. (2015), “Quantitative evaluation of voids in lead free solder joints”, Applied Mechanics and Materials, Vol. 772, pp. 284-289.
Miric, A.Z. (2010), “New developments in high-temperature, high-performance lead-free solder alloys”, Proceedings of SMTA International Conference, Oct. 24-28, Orlando, FL, available at: www.magazines007.com/pdf/AntonMiricHeraeus.pdf
Mokler, S., Aspandiar, R., Byrd, K., Chen, O., Walwadkar, S., Tang, K.K., Renavikar, M. and Sane, S. (2016), “The application of Bi-based solders for low temperature reflow to reduce cost while improving SMT yields in client computing systems”, Proceedings of SMTA International, Sep. 25-29, 2016, Rosemont, IL, pp. 318-326.
O’Neill, T. (2017), “Life after SAC”, available at: www.aimsolder.com/technical-articles/life-after-sac
O’Neill, T. and Seelig, K. (2016), “Minimizing BTC voids”, available at: www.aimsolder.com/technical-articles/minimizing-btc-voids
Pandher, R.S., Lewis, B.G., Vongaveti, R. and Singh, B. (2007), “Drop shock reliability of lead-free alloys – effect of micro-additives”, Proceedings 57th Electronic Components and Technology Conference, Reno, NV, available at https://smtnet.com/library/files/upload/drop-shock-reliability-alloys.pdf
Previti, M., Holtzer, M. and Hunsinger, T. (2010), “Four ways to reduce voids in BGA/CSP package to substrate connections”, SMTA International Conference 2010 Proceedings, Orlando, FL.
Ptak, P., Górecki, K. and Dziurdzia, B. (2019), “Modelling thermal properties of large LED modules”, Materials Science-Poland, Vol. 37 No. 4, pp. 628-638.
Qu, W. (2011), “How to reduce voiding in components with large pads”, Indium Corporation Tech Paper, available at: www.globalspec.com/Indium/ref/how_to_reduce_voiding_in_components_with_large_pads_98788_r0.pdf
Raypah, M., Devarajan, M. and Sulaiman, F. (2018), “Effects of solder paste on thermal and optical performance of high-power ThinGaN white LED”, Soldering & Surface Mount Technology, Vol. 30 No. 3, pp. 182-193.
Ribas, M., Kumar, A., Kosuri, D., Raghu, R., Choudhury, P., Telu, S. and Sarkar, S. (2017), “Low temperature soldering using Sn-Bi alloys”, Proceedings of SMTA International Conference, Sep. 17-21, Rosemont, IL, pp. 201-206.
Samiappan, S. (2013), “Alternative Pb-free soldering alloys”, Indium Corporation Tech Paper, available at: www.circuitnet.com/news/uploads/2/Alternative_Pb-Free_Soldering_Alloys_-_98954_R0.pdf
Seelig, K., O’Neill, T., Pigeon, K. and Maaleckian, M. (2013), “Production testing of Ni-modifies SnCu solder paste”, Proceedings of SMTA International, Ft. Worth, TX, available at: www.aimsolder.com/es/technical-articles/production-testing-ni-modified-sncu-solder-paste
Skwarek, A., Illés, B., Witek, K., Hurtony, T., Tarasiuk, J., Wronski, S. and Synkiewicz, B.K. (2018), “Reliability studies of innolot and SnBi joints soldered on DBC substrate”, Soldering & Surface Mount Technology, Vol. 30 No. 4, pp. 205-212.
Sobolewski, M. and Dziurdzia, B. (2019), “Experimental approach to thermal conductivity of macro solder joints with voids”, Soldering & Surface Mount Technology, Vol. 31 No. 3, pp. 181-191.
Sun, L. and Zhang, L. (2015), “Properties and microstructures of Sn-Ag-Cu-X lead-free solder joints in electronic packaging”, Advances in Materials Science and Engineering, Article ID 639028, Vol. 2015, pp. 1-16.
Teliszewski, S. (2019), “Development and testing of a lead-free low melting point alloy”, Circuit insight, available at: www.circuitinsight.com/programs/55445.html
Triola, M. (2013), Essential Statistics, Pearson, London.
Ulzhöfer, C. (2013), “Vacuum reflow: a simple approach for void reduction by means of an inline reflow system”, available at: www.smt-wertheim.de/fileadmin/Redakteure/Prospekte/E_SMT_Vacuum_Paper.pdf
Weng, W.N.C. (2017), “Evolution of Pb-free solders”, IntechOpen, Chapter 5, available at: www.intechopen.com/profiles/201758/wayne-chee-weng-ng
Further reading
Data sheet CVP390 (2011), “AIM”, available at: www.toimisait.com/amitronic/userData/docs/tb-cvp-390-cnp-05.13.11.pdf
Data sheet LMPA-Q6 (2017), “Interflux”, available at: https://store.comet.bg/download-file.php?id=16433
Data sheet M8 (2017), “AIM”, available at: www.aimsolder.com/sites/default/files/m8_solder_paste_tds.pdf
Data sheet OM-338-PT (2020), “AIM”, available at: https://alphaassembly.com〉Solder-Paste〉OM-338-PT
Data sheet OM340 “AIM”, available at: www.solderconnection.com/specsheets/TB-OM340_SAC305_Solder_Paste.pdf
Data sheet OM5100 (2020), “AIM”, available at: https://alphaassembly.com〉Solder-Paste〉OM-5100
Data sheet REL22 (2020), “AIM”, available at: www.aimsolder.com/sites/default/files/rel61_lead_free_solder_alloy_tds.pdf
Data sheet REL61 (2020), “AIM”, available at: www.aimsolder.com/sites/default/files/rel61_lead_free_solder_alloy_tds.pdf
Acknowledgements
This work was supported by the Polish Ministry of Science and Higher Education under subvention funds for the AGH Department of Electronics and by the Fideltronik SA, Kraków and the Fideltronik Poland Ltd, Sucha Beskidzka.