Influence of copper pillar bump structure on flip chip packaging during reflow soldering: a numerical approach
Microelectronics International
ISSN: 1356-5362
Article publication date: 23 September 2021
Issue publication date: 27 October 2021
Abstract
Purpose
The purpose of this paper is to present the experimental and simulation studies on the influence of copper pillar bump structure on flip chip packaging during reflow soldering.
Design/methodology/approach
In this work, solidification/melting modelling and volume of fluid modelling were used. Reflow soldering process of Cu pillar type FC was modelled using computational fluid dynamic software (FLUENT). The experimental results have been validated with the simulation results to prove the accuracy of the numerical method.
Findings
The findings of this study reveal that solder volume is the most important element influencing reflow soldering. The solder cap volume reduces as the Cu pillar bump diameter lowers, making the reflow process more difficult to establish a good solder union, as less solder is allowed to flow. Last but not least, the solder cap height for the reflow process must be optimized to enable proper solder joint formation.
Practical implications
This study provides a basis and insights into the impact of copper pillar bump structure on flip chip packaging during reflow soldering that will be advancing the future design of 3D stack package. This study also provides a superior visualization and knowledge of the melting and solidification phenomenon during the reflow soldering process.
Originality/value
The computational fluid dynamics analysis of copper pillar bump structure on flip chip packaging during reflow soldering is scant. To the authors’ best knowledge, no research has been concentrated on copper pillar bump size configurations in a thorough manner. Without the in-depth study, copper pillar bump size might have the impact of copper pillar bump structure on flip chip packaging during reflow soldering. Five design of parameter of flip chip IC package model was proposed for the investigation of copper pillar bump structure on flip chip packaging during reflow soldering.
Keywords
Acknowledgements
The work is financially supported by the Ministry of Higher Education under Fundamental Research Grant Scheme, FRGS/1/2020/TK0/USM/03/6 and Short Term Grant Scheme (304/PAERO/6315555). The authors would also like to thanks Universiti Sains Malaysia for providing technical support.
Citation
Ishak, M.H.H., Abdul Aziz, M.S., Ismail, F. and Abdullah, M.Z. (2021), "Influence of copper pillar bump structure on flip chip packaging during reflow soldering: a numerical approach", Microelectronics International, Vol. 38 No. 4, pp. 172-181. https://doi.org/10.1108/MI-05-2021-0044
Publisher
:Emerald Publishing Limited
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