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The purpose of this paper is to explore use of community treatment orders (CTOs) in adults with intellectual disability (ID) and mental health problems across England and Wales.

A web-based exploratory survey was sent to 359 consultants on the database of the Faculty of the Psychiatry of ID, Royal College of Psychiatrists who had declared ID as their main speciality. Socio-demographic details of responding consultants, clinical characteristics of adults with ID on CTO, subjective views of consultants on using CTOs in people with ID were collected and analysed.

In total, 94 consultant questionnaires were returned providing information on 115 patients detained under CTO. More than 75 per cent of the respondents had used CTO in their clinical practice. Patients subject to CTO were generally young, white males with mild ID and living in supported accommodation. CTOs were primarily used in situations of non-engagement (52.2 per cent), non-compliance with medication (47 per cent) or non-compliance with social care supports (49.6 per cent).

Responding consultants expressed concerns about encroachment of civil liberties and ethics of using CTOs in people with ID who may lack capacity and stressed that decision to use CTOs needs to be therefore done on individual basis.

This is the first national study to examine the practice of applying CTOs in adults with ID and mental disorders. Current practice is based on evidence from research done in adults with normal intelligence. Further research is needed to investigate the utility of CTOs in routine clinical practice in adults with ID and mental disorders.

The purpose of this article is to explore the current evidence base in understanding the relationship between mental health and challenging behaviour in people with intellectual disabilities.

The article discusses how challenging behaviour is associated with psychiatric disorders. Common aetiological factors between challenging behaviour and psychiatric disorders and diagnostic issues are considered. The article ends with a review of the assessment and management of challenging behaviour within the context of mental health.

Several studies have highlighted common aetiological factors that are responsible for challenging behaviour and psychiatric disorders in people with intellectual disabilities, and although there is an overlap in the symptoms, both are thought to be different phenomena. Treatment of the psychiatric disorder should ameliorate the challenging behaviour, although a functional analysis of the behaviour may still be required in order to understand the purpose of the behaviour. There is evidence for a range of different treatment approaches.

The article will assist professionals working with people with intellectual disabilities to understand the complex relationship between mental health and challenging behaviour. It also gives guidance on principles of management of people with complex mental health and behavioural needs.

This work is proposed for low power energy-efficient applications like laptops, mobile phones, and palmtops. In this study, P-channel metal–oxide–semiconductor (PMOS)’s are used as access transistor in 7 transistors (7 T) Static Random Access Memory (SRAM) cell, and the theoretical Static Noise Margin (SNM) analysis for the proposed cell is also performed. A cell is designed using 7 T which consists of 4 PMOS and 3 NMOS. In this paper write and hold SNM is addressed and read SNM is also calculated for the proposed 7 T SRAM cell.

The authors have replaced N-channel metal–oxide–semiconductor (NMOS) access transistors with the PMOS access transistors, which results in proper data line recovery and provides the desired coupling. An error is likely to occur, if the read operation is performed too often probably by using the NMOS pass gate. It results in an improper recovery of the data line. Instead, by using PMOS as a pass gate, the time required for read operation can be brought down. As we know the mobility (µ) of the PMOS transistor is low, so the authors have used this property into the proposed design. When a low signal is applied to its control gate, the PMOS transistor come up with the desired coupling, when working as a pass gate.

Feedback switched transistor is used in the proposed circuit, which plays an important role in the write operation. This transistor is in OFF state and PMOS’s work as access transistor, when the proposed cell operating in read mode. This helps in the reduction of power. This work is simulated using UMC 40 nm technology node in the cadence virtuoso environment. The simulated result shows that, write power saving of 51.54% and 61.17%, hold power saving of 25.68% and 48.93% when compared with reported 7 T and 6 T, respectively.

The proposed 7 T SRAM cell provides proper data line recovery at a lower voltage when PMOS works as the access transistor. Power consumption is very less in this technique and it is best suitable for low power applications.

The purpose of this paper is to assess the significance of the Merton distance-to-default (DD) in predicting defaults for a sample of listed Indian firms.

The study uses a matched pair sample of defaulting and non-defaulting listed Indian firms. It employs two alternative statistical techniques, namely, logistic regression and multiple discriminant analysis.

The option-based DD is found to be statistically significant in predicting defaults and has a significantly negative relationship with the probability of default. The DD retains its significance even after the addition of Altman’s Z-score. This further establishes its robustness as a significant predictor of default.

The study re-establishes the utility of the Merton model in India using a simplified version of the Merton model that can be easily operationalized by practitioners, reasonably larger sample size and is done in a more recent period covering the post global financial crisis period. The findings could be valuable to banks, financial institutions, investors and managers.