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This study explores the link between additional reviews, credibility, and consumers’ online purchasing behavior.

We employ a 2 × 2 between-subjects design to measure subjects’ purchasing behavior with versus without additional reviews and with important versus non-important attributes. A total of 529 valid questionnaires are collected from university students across 30 Chinese provinces.

The addition of negative reviews to a positive initial review enhances consumers’ perceived credibility of the reviewer and the overall review content. This effect is positively moderated by the attribute importance in additional reviews. Moreover, we find that as the time interval increases, consumers’ perceived credibility gradually increases but eventually decreases after reaching a certain threshold. In addition, the attribute importance in additional reviews negatively moderates the impact of perceived credibility on consumer purchasing behavior.

Existing studies on first and subsequent reviews mainly focus on the difference in perceived usefulness between the two. They do not examine how additional reviews affect potential customers’ perceived credibility and their purchase decision-making. This study bridges the gap between the word-of-mouth literature and marketing practices.

The purpose of this study is to investigate the influence of geometric parameters of removable panels on the sealing characteristics of ceramic wafer seal structure subjected to high-temperature gas flow.

Based on the laminar flow Reynolds equation, the theoretical and numerical calculation models were constructed to investigate the influence of external convex deformation of removable panel on leakage rate. The theoretical formula for leakage rate after deformation of the removable panel was derived, and the flow field and leakage characteristics of ceramic wafer seal under different operating parameters were studied.

The leakage rate exhibits consistent trends between theoretical calculation, numerical simulation and experimental value, with a maximum discrepancy of 8.9%. This validates the accuracy of both the theoretical model and numerical simulation. As the deformation angle of the removable panel increases, the sealing gap gradually widens, resulting in a compromised sealing effect. Moreover, the leakage rate in the central region of the sealing area is lower compared to that at both ends.

The leakage of the ceramic wafer seal structure under the removable panel with different deformation angles can be monitored based on Reynolds equation. The pseudo-transient numerical calculation method can be used to determine the leakage value of the micro-state ceramic wafer seal structure. These research findings provide a theoretical foundation and numerical investigation approach for studying ceramic wafer seal structures.

The purpose of this study is to investigate the mechanism of shared leadership on team members’ innovative behavior.

Paired questionnaires were collected from 89 scientific research teams in the Beijing-Tianjin-Hebei region of China at two-time points with a time lag of 4 months. Then multilevel structural equation model method was applied to analyze the multiple mediating effects.

This study finds that: the form of shared leadership in scientific research teams of universities; shared leadership has a positive impact on team members’ innovative behavior; there are multiple mediations in the relationship including synchronization and sequence of creative self-efficacy and achievement motivation.

According to the “stimulus-organism-response” model, this paper has constructed a multi-level theoretical model that shared leadership influences individual innovation behavior and reveals the “black box” from the perspective of psychological mechanism. It not only verifies that “can-do” shapes “willing to do” but also makes up for the gap of an empirical test of the effectiveness of shared leadership in scientific research teams of universities. Besides, the formal scale of shared leadership in the Chinese situation is revised, which can provide a reference for future empirical research on shared leadership. The research conclusions provide new ideas for improving the management of scientific research teams in universities.

The purpose of this paper is to analyze and compare the mechanical properties of sintered nanosilver with different porosities at both the mesoscopic and macroscopic scales and to conduct a multiscale analysis of the porosity effect on the mechanical properties of sintered nanosilver.

This paper establishes a mesoscopic model for the uniaxial tension of sintered nanosilver and a macroscopic model for chips containing sintered silver layers. Using the finite element method, combined with crystal plasticity theory and unified creep plasticity theory, a multiscale analysis is conducted for the mechanical properties of sintered nanosilver. First, stress distribution characteristics under uniaxial tensile loading for different porosities in sintered nanosilver polycrystal models are analyzed at the mesoscopic scale. Second, at the macroscopic scale, the mechanical performance of sintered nanosilver layers with varying porosities in high-power chip models under cyclic loading is analyzed. Finally, the porosity influence on the damage evolution in sintered nanosilver is summarized, and simulations are conducted to explore the evolution of damage parameters in sintered nanosilver under different porosities.

In the mesoscopic model, the presence of mesoscale voids affects the stress distribution in sintered nanosilver subjected to tensile loading. Sintered nanosilver with lower porosity exhibits higher tensile strength. In the macroscopic model, sintered nanosilver layers with lower porosity correspond to a more uniform stress distribution, whereas higher porosity leads to faster accumulation of plastic strain in the sintered layer. During chip packaging processes, improving processes to reduce the porosity of sintered layers can delay the initiation of damage and the propagation of cracks in sintered nanosilver.

During chip packaging processes, improving processes to reduce the porosity of sintered layers can delay the initiation of damage and the propagation of cracks in sintered nanosilver.

This paper innovatively uses a mesoscopic crystal plasticity constitutive model and a macroscopic unified creep plasticity constitutive model to analyze the mechanical behavior of sintered nanosilver with different porosities. It comprehensively investigates and explains the influence of porosity on the mechanical performance of sintered nanosilver across multiple scales.

As the solution to improve fatigue life and mechanical reliability of packaging structure, the material selection in PCB stack-up and partitioning design on PCB to eliminate the electromagnetic interference by keeping all circuit functions separate are suggested to be optimized from the mechanical stress point of view.

The present paper investigated the effect of RO4350B and RT5880 printed circuit board (PCB) laminates on fatigue life of the QFN (quad flat no-lead) packaging structure for high-frequency applications. During accelerated thermal cycling between −50 °C and 100 °C, the mismatched coefficients of thermal expansion (CTE) between packaging and PCB materials, initial PCB warping deformation and locally concentrated stress states significantly affected the fatigue life of the packaging structure. The intermetallics layer and mechanical strength of solder joints were examined to ensure the satisfactorily soldering quality prior to the thermal cycling process. The failure mechanism was investigated by the metallographic observations using a scanning electron microscope.

Typical fatigue behavior was revealed by grain coarsening due to cyclic stress, while at critical locations of packaging structures, the crack propagations were confirmed to be accompanied with coarsened grains by dye penetration tests. It is confirmed that the cyclic stress induced fatigue deformation is dominant in the deformation history of both PCB laminates. Due to the greater CTE differences in the RT5880 PCB laminate with those of the packaging materials, the thermally induced strains among different layered materials were more mismatched and led to the initiation and propagation of fatigue cracks in solder joints subjected to more severe stress states.

In addition to the electrical insulation and thermal dissipation, electronic packaging structures play a key role in mechanical connections between IC chips and PCB.

Vapor phase soldering (VPS), also known as condense soldering, is capable of improving the mechanical reliability of solder joints in electronic packaging structures. The paper aims to discuss this issue.

In the present study, VPS is utilized to assemble two typical packaging types (i.e. ceramic column grid array (CCGA) and BGA) for electronic devices with lead-containing and lead-free solders. By applying the peak soldering temperatures of 215°C and 235°C with and without vacuum condition, the void formation and intermetallic compound (IMC) thickness are compared for different packaging structures with lead-containing and lead-free solder alloys.

It is found that at the soldering temperature of 215°C, CCGA under a vacuum condition has fewer voids but BGA without vacuum environment has fewer voids despite of the existence of lead in solder alloy. In light of contradictory phenomenon about void formation at 215°C, a similar CCGA device is soldered via VPS at the temperature of 235°C. Compared with the size of voids formed at 215°C, no obvious void is found for CCGA with vacuum at the soldering temperature of 235°C. No matter what soldering temperature and vacuum condition are applied, the IMC thickness of CCGA and BGA can satisfy the requirement of 1.0–3.0 µm. Therefore, it can be concluded that the soldering temperature of 235°C in vacuum is the optimal VPS condition for void elimination. In addition, shear tests at the rate of 10 mm/min are performed to examine the load resistance and potential failure mode. In terms of failure mode observed in shear tests, interfacial shear failure occurs between PCB and bulk solder and also within bulk solder for CCGA soldered at temperatures of 215°C and 235°C. This means that an acceptable thicker IMC thickness between CCGA solder and device provides greater interfacial strength between CCGA and device.

Due to its high I/O capacity and satisfactory reliability in electrical and thermal performance, CCGA electronic devices have been widely adopted in the military and aerospace fields. In the present study, the authors utilized VPS to assemble a typical type of CCGA with the control package of conventional BGA to investigate the relation between essential condition (i.e. soldering temperature and vacuum) to void formation.