This paper aims to present an adaptation of digital image correlation (DIC) to the electronics industry for reliability assessment of electronic packages. Two case studies are…
Abstract
Purpose
This paper aims to present an adaptation of digital image correlation (DIC) to the electronics industry for reliability assessment of electronic packages. Two case studies are presented: one for warpage measurement of a micro-electro-mechanical system (MEMS) package under different temperature conditions and the other for the measurement of transient displacements on the surface of a printed circuit board (PCB) assembly under free-fall drop conditions, which is for explaining the typical camera setup requirement and comparing among different boundary conditions by fastening methods of PCB.
Design/methodology/approach
DIC warpage measurements on a small device, such as a MEMS package, require a special speckle pattern. A new method for the creation of speckle patterns was developed using carbon coating and aluminum evaporative deposition. To measure the transient response on the surface of a PCB during a free-fall impact event, three-dimensional (3D) DIC was integrated with synchronized stereo-high speed cameras. This approach enables the measurement of full-field displacement on the PCB surface during a free-fall impact event, contrary to the localized information that is obtained by the conventional strain gage and accelerometer method.
Findings
The authors suggest the proposed patterning method to the small-sized microelectronics packages for DIC measurements. More generally, the idea is to have a thin layer of the dark or bright color of the background and then apply the white or black colored pattern, respectively, so that the surface has high contrast. Also, to achieve a proper size of speckles, this paper does not want to expose the measuring objects to high temperatures or pressures during the sample preparation stage. Of course, it seems a complicated process to use aluminum evaporator, carbon coater and electroformed mesh. However, the authors intend to share one of the solutions to achieve a proper pattern on such small-sized electronic packages.
Originality/value
3D DIC technique can be successfully implemented for the measurement of micro-scale deformations in small packages (such as MEMS) and for the analysis of dynamic deformation of complex PCB.
Details
Keywords
The purpose of this paper is to assess the thermo-mechanical reliability of a solder bump with different underfills, with the evaluation of different underfill materials. As there…
Abstract
Purpose
The purpose of this paper is to assess the thermo-mechanical reliability of a solder bump with different underfills, with the evaluation of different underfill materials. As there is more demand in higher input/output, smaller package size and lower cost, a flip chip mounted at the module level of a board is considered. However, bonding large chips (die) to organic module means a larger differential thermal expansion mismatch between the module and the chip. To reduce the thermal stresses and strains at solder joints, a polymer underfill is added to fill the cavity between the chip and the module. This procedure has typically, at least, resulted in an increase of the thermal fatigue life by a factor of ten, as compared to the non-underfilled case. Yet, this particular case is to deal with a flip chip mounted on both sides of a printed circuit board (PCB) module symmetrically (solder bump interconnection with Cu-Pillar). Note that Cu-Pillar bumping is known to possess good electrical properties and better electromigration performance. The drawback is that the Cu-Pillar bump can introduce high stress due to the higher stiffness of Cu compared to the solder material.
Design/methodology/approach
As a reliability assessment, thermal cyclic loading condition was considered in this case. Thermal life prediction was conducted by using finite element analysis (FEA) and modified Darveaux’s model, considering microsize of the solder bump. In addition, thermo-mechanical properties of four different underfill materials were characterized, such as Young’s modulus at various temperatures, coefficient of temperature expansion and glass transition temperature. By implementing these properties into FEA, life prediction was accurately achieved and verified with experimental results.
Findings
The modified life prediction method was successfully adopted for the case of Cu-Pillar bump interconnection in flip chip on the module package. Using this method, four different underfill materials were evaluated in terms of material property and affection to the fatigue life. Both predicted life and experimental results are obtained.
Originality/value
This study introduces the technique to accurately predict thermal fatigue life for such a small scale of solder interconnection in a newly designed flip chip package. In addition, a guideline of underfill material selection was established by understanding its affection to thermo-mechanical reliability of this particular flip chip package structure.
Details
Keywords
This paper aims to develop an estimation tool for warpage behavior of slim printed circuit board (PCB) array while soldering with electronic components by using finite element…
Abstract
Purpose
This paper aims to develop an estimation tool for warpage behavior of slim printed circuit board (PCB) array while soldering with electronic components by using finite element method. One of the essential requirements for handheld devices, such as smart phone, digital camera, and Note-PC, is the slim design to satisfy the customers’ desires. Accordingly, the printed circuit board (PCB) should be also thinner for a slim appearance, which would result in decreasing the PCB’s bending stiffness. This means that PCB deforms severely during the reflow (soldering) process where the peak temperature goes up to 250°C. Therefore, it is important to estimate PCB deformation at a high temperature for thermo-mechanical quality/reliability after reflow process.
Design/methodology/approach
A numerical simulation technique was devised and customized to accurately estimate the behavior of a thin printed board assembly (PBA) during reflow by considering all components, including PCB, microelectronic packages and solder interconnects.
Findings
By applying appropriate constraints and boundary conditions, it was found that PBA’s warpage can be accurately predicted during the reflow process. The results were also validated by warpage measurement, which showed a fairly good agreement with one and another.
Research limitations/implications
For research limitations, there are many assumptions regarding numerical modeling. That is, the viscoplastic material property of solder ball is ignored, the reflow profile is simplified and the accurate heat capacity is not considered. Furthermore, the residual stress within the PCB, generated at PCB manufacturing process, is not included in this paper.
Practical implications
This paper shows how to calculate PBA warpage during the reflow process as accurately as possible. This methodology helps a PCB designer and surface-mount technology (SMT) process manager to predict a PBA warpage issue and modify PCB design before PCB real fabrication. Practically, this modeling and simulation process can be easily performed by using a graphical user interface (GUI) module, so that the engineer can handle an issue by inputting some numbers and clicking some buttons.
Social implications
In a common sense manner, a numerical simulation method can decrease time and cost in manufacturing real samples. This PCB warpage method can also decrease product development duration and produce a new product earlier. Furthermore, PCB is a common component in all the electronic devices. So, this PCB warpage method can have various applications.
Originality/value
Because of an economic advantage, the development of a numerical simulation tool for estimating the thin PBA warpage behaviour during reflow process was attempted. The developed tool contains the features of detailed modeling for electronic components and contact boundary conditions of the supporting rails in the reflow oven.