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Article
Publication date: 13 October 2022

Marcin Myśliwiec, Ryszard Kisiel and Mirosław J. Kruszewski

The purpose of this paper is to develop and test the thermal interface materials (TIM) for application in assembly of semiconductor chips to package. Good adhesion properties…

494

Abstract

Purpose

The purpose of this paper is to develop and test the thermal interface materials (TIM) for application in assembly of semiconductor chips to package. Good adhesion properties (>5 MPa shear strength) and low thermal interface resistance (better than for SAC solders) are the goal of this research.

Design/methodology/approach

Mechanical and thermal properties of TIM joints between gold plated contacts of chip and substrate were investigated. Sintering technique based on Ag pastes was applied for purpose of this study. Performance properties were assessed by shear force tests and thermal measurements. Scanning electron microscopy was used for microstructural observations of cross-section of formed joints.

Findings

It was concluded that the best properties are achieved for pastes containing spherical Ag particles of dozens of micrometer size with flake shaped Ag particles of few micrometers size. Sintering temperature at 230°C and application of 1 MPa force on the chip during sintering gave the higher adhesion and the lowest thermal interface resistance.

Originality/value

The new material based on Ag paste containing mixtures of Ag particles of different size (form nanometer to dozens of microns) and shape (spherical, flake) suspended in resin was proposed. Joints prepared using sintering technique and Ag pastes at 230°C with applied pressure shows better mechanical and thermal than other TIM materials such as thermal grease, thermal gel or thermally conductive adhesive. Those material could enable electronic device operation at temperatures above 200°C, currently unavailable for Si-based power electronics.

Details

Microelectronics International, vol. 39 no. 4
Type: Research Article
ISSN: 1356-5362

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Article
Publication date: 6 February 2017

Krzysztof Górecki, Damian Bisewski, Janusz Zarębski, Ryszard Kisiel and Marcin Myśliwiec

This paper aims to present the results of measurements and calculations illustrating mutual thermal coupling between power Schottky diodes made of silicon carbide situated in the…

84

Abstract

Purpose

This paper aims to present the results of measurements and calculations illustrating mutual thermal coupling between power Schottky diodes made of silicon carbide situated in the common case.

Design/methodology/approach

The idea of measurements of mutual transient thermal impedances of the investigated device is described.

Findings

The results of measurements of mutual transient thermal impedances between the considered diodes are shown. The experimentally verified results of calculations of the internal temperature waveforms of the considered diodes obtained with mutual thermal coupling taken into account are presented and discussed. The influence of mutual thermal coupling and a self-heating phenomenon on the internal temperature of the considered diodes is pointed out.

Research limitations/implications

The presented methods of measurements and calculations can be used for constructing the investigated diodes made of other semiconductor materials.

Originality/value

The presented results prove that mutual thermal coupling between diodes mounted in the common case must be taken into account to calculate correctly the waveforms of the device internal temperature.

Details

Circuit World, vol. 43 no. 1
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 22 July 2020

Ryszard Kisiel, Marek Guziewicz, Andrzej Taube, Maciej Kaminski and Mariusz Sochacki

This paper aims to investigate the sintering and solid liquid interdiffusion bonding (SLID) techniques to attach AlGaN/GaN-on-Si chips to direct bond copper (DBC) substrate. The…

221

Abstract

Purpose

This paper aims to investigate the sintering and solid liquid interdiffusion bonding (SLID) techniques to attach AlGaN/GaN-on-Si chips to direct bond copper (DBC) substrate. The influence of metal layers deposited on the backside of AlGaN/GaN-on-Si dies on the assembly process is also investigated.

Design/methodology/approach

The authors assumed the value of the shear strength to be a basic parameter for evaluation of mechanical properties. Additionally, the surface condition after shearing was assessed by SEM photographs and the shear surface was studied by X-ray diffraction method. The SLID requires Sn-plated DBC substrate and can be carried out at temperature slightly higher than 250°C and pressure reduced to 4 MPa, while the sintering requires process temperature of 350°C and the pressure at least 7.5 MPa.

Findings

Ag-, Au-backside covered high electron mobility transistor (HEMT) chips can be assembled on Sn-plated DBC substrates by SLID technology. In case of sintering technology, Cu- or Ag-backside covered HEMT chips can be assembled on Ag- or Ni/Au-plated DBC substrates. The SLID process can be realized at lower temperature and decreased pressure than sintering process.

Research limitations/implications

For SLID technology, the adhesion between Cu-backside covered HEMT die and DBC with Sn layer loses its operational properties after short-term ageing in air at temperature of 300°C.

Originality/value

In the SLID process, Sn-Cu and Sn-Ag intermetallic compounds and alloys are responsible for creation of the joint between Sn-plated DBC and micropowder Ag layer, while the sintered joint between the chip and Ag-based micropowder is formed in diffusion process.

Details

Circuit World, vol. 47 no. 2
Type: Research Article
ISSN: 0305-6120

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Article
Publication date: 3 August 2015

Marcin Myśliwiec, Ryszard Kisiel and Marek Guziewicz

The purpose of this paper is to deal with material and technological aspects of SiC diodes assembly in ceramic packages. The usefulness of combinations of different materials and…

238

Abstract

Purpose

The purpose of this paper is to deal with material and technological aspects of SiC diodes assembly in ceramic packages. The usefulness of combinations of different materials and assembly techniques for the creation of inner connection system in the ceramic package, as well as the formation of outer connections able to work at temperatures up to 350°C, were evaluated.

Design/methodology/approach

The ceramic package consists of direct bonded copper (DBC) substrate with Cu pads electroplated by Ni or Ni/Au layers on which a SiC diode was assembled by sintering process using Ag microparticles. For the connections inside the ceramic package, the authors used Al/Ni and Au-Au material system based on aluminium or gold wire bonding. The authors sealed the ceramic package with glass encapsulation and achieved a full encapsulation. Outer connections were manufactured using Cu ribbon plated with Ag layer and sintered to DBC by Ag micro particle. The authors investigated the long-term stability of electrical parameters of SiC diodes assembled in ceramic package at temperature 350°C.

Findings

The authors have shown that Schottky and PiN SiC diodes assembled with different technologies and materials in ceramic package keep their I-V characteristics unchanged during ageing at 350°C for 400 h.

Originality/value

The SiC diodes assembled into ceramic package with Al/Ni or Au-Au inner electrical connection systems and outer connections system based on Ag microparticles sintering process of Cu/Ag ribbon to DBC substrate can work reliably in temperature range up to 350°C.

Details

Microelectronics International, vol. 32 no. 3
Type: Research Article
ISSN: 1356-5362

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Article
Publication date: 5 January 2015

Marcin Myśliwiec and Ryszard Kisiel

The purpose of our paper is to investigate thermal and mechanical properties of Ag sintered layers used for assembly of SiC diode to Direct Bonding Copper (DBC) interposer. How…

298

Abstract

Purpose

The purpose of our paper is to investigate thermal and mechanical properties of Ag sintered layers used for assembly of SiC diode to Direct Bonding Copper (DBC) interposer. How SiC devices are assembled to ceramic package defines efficiency of heat transfer and mechanical support.

Design/methodology/approach

Ag microparticles, sized 2-4 μm and flake shaped, were used as joining material. The parameters of sintering process were as follows: temperature 400°C, pressure 10 MPa and time 40 min. It was found that after sintering and long-term aging in air at 350°C the adhesion is in the range of 10 MPa, which is enough from a practical point of view. The thermal properties of the SiC die assembled into a ceramic package were also investigated. In the first step, the calibration of the temperature-sensitive parameter VF (IF = 2 mA) was done and the relation between VF and temperature was found. In the next step, the thermal resistance between junction and case was determined knowing junction and case temperature.

Findings

For SiC diode with Au bottom metallization joined to the DBC interposer by Ni/Au metallization by Ag microparticle layer, Rth j-c is in the range of 2-3.5°C/W, and for SiC diode with Ag bottom metallization joined to DBC interposer with Ag metallization by Ag microparticle layer, Rth j-c is in the range of 4.5-5.5°C/W.

Research limitations/implications

In the future, research on thermal resistance of SiC diodes assembled onto the DBC interposer with Au and Ag metallization in the temperature range up to 350°C needs to be carried out. To do this, it necessary to find a solution for the attaches that leads to ceramic package able to work at such high temperature.

Originality/value

Obtained results are comparable with results mentioned by other studies for eutectic Au/Sn or SAC solder joints; however, the solution proposed by us can properly work at significantly higher temperatures.

Details

Microelectronics International, vol. 32 no. 1
Type: Research Article
ISSN: 1356-5362

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Article
Publication date: 1 February 2016

Wojciech Grzesiak, Piotr Maćków, Tomasz Maj, Beata Synkiewicz, Krzysztof Witek, Ryszard Kisiel, Marcin Myśliwiec, Janusz Borecki, Tomasz Serzysko and Marek Żupnik

This paper aims to present certain issues in direct bonded copper (DBC) technology towards the manufacture of Al2O3 or AlN ceramic substrates with one or both sides clad with a…

400

Abstract

Purpose

This paper aims to present certain issues in direct bonded copper (DBC) technology towards the manufacture of Al2O3 or AlN ceramic substrates with one or both sides clad with a copper (Cu) layer.

Design/methodology/approach

As part of the experimental work, attempts were made to produce patterns printed onto DBC substrates based on four substantially different technologies: precise cutting with a diamond saw, photolithography, the use of a milling cutter (LPKF ProtoMat 93s) and laser ablation with differential chemical etching of the Cu layer.

Findings

The use of photolithography and etching technology in the case of boards clad with a 0.2-mm-thick Cu layer, can produce conductive paths with a width of 0.4 mm while maintaining a distance of 0.4 mm between the paths, and in the case of boards clad with a 0.3-mm-thick copper layer, conductive paths with a width of 0.5 mm while maintaining a distance of 0.5 mm between paths. The application of laser ablation at the final step of removing the unnecessary copper layer, can radically increase the resolution of printed pattern even to 0.1/0.1 mm. The quality of the printed pattern is also much better.

Research limitations/implications

Etching process optimization and the development of the fundamentals of technology and design of power electronic systems based on DBC substrates should be done in the future. A limiting factor for further research and its implementation may be the relatively high price of DBC substrates in comparison with typical PCB printed circuits.

Practical implications

Several examples of practical implementations using DBC technology are presented, such as full- and half-bridge connections, full-wave rectifier with an output voltage of 48 V and an output current of 50 A, and part of a battery discharger controller and light-emitting diode illuminator soldered to a copper heat sink.

Originality/value

The paper presents a comparison of different technologies used for the realization of precise patterns on DBC substrates. The combination of etching and laser ablation technologies radically improves the quality of DBC-printed patterns.

Details

Circuit World, vol. 42 no. 1
Type: Research Article
ISSN: 0305-6120

Keywords

Available. Content available
Article
Publication date: 1 August 2001

154

Abstract

Details

Microelectronics International, vol. 18 no. 2
Type: Research Article
ISSN: 1356-5362

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Article
Publication date: 23 August 2021

Xiuqi Wang, Fenglian Sun, Bangyao Han, Yilun Cao, Jinyang Du, Long Shao and Guohuai Liu

The purpose of this paper is to investigate the wetting behaviors of Sn-5Sb-CuNiAg solders on copper substrates in different soldering processes and the effects of alloying…

176

Abstract

Purpose

The purpose of this paper is to investigate the wetting behaviors of Sn-5Sb-CuNiAg solders on copper substrates in different soldering processes and the effects of alloying elements on the wettability.

Design/methodology/approach

Sn-5Sb-CuNiAg solder balls (750 µm in diameter) were spread and wetted on 40 × 40 × 1 mm copper plates, in different fluxes, soldering temperatures and time. The contact angles were obtained by a home-made measuring instrument. The samples were polished and deep etched before analyzed by scanning electron microscopy. Energy dispersive X-ray spectroscopy was used to identify the composition of the joints.

Findings

The effects of different soldering processes and alloying elements on the wetting behaviors of Sn-5Sb-CuNiAg solders on copper substrates were calculated and expounded. The rosin-based flux could effectively remove oxidation layers and improve the wettability of Sn-5Sb-CuNiAg solders. Then with the increase of soldering temperature and time, the contact angles decreased gradually. The soldering processes suited for Sn-5Sb-CuNiAg solders were RMA218, 280°C and 30 s. Considered the effects of alloying elements, the wettability of Sn-5Sb-0.5Cu-0.1Ni-0.5Ag was relatively favorable on copper substrates. Besides, Ni could accumulate at the solder/Cu interface and form a jagged (Cu,Ni)6Sn5 IMC.

Originality/value

This work was carried out with our handmade experiment equipment and the production of the quinary lead-free solder alloy used in wetting tests belongs to us. The investigated Sn-5Sb-CuNiAg alloys exhibited higher melting point and preferable wettability, that was one of the candidates for high-temperature lead-free solders to replace high-Pb solders, and applied extremely to high temperature and frequency working environments of the third-generation semiconductors components, with a greater potential research and development value.

Details

Soldering & Surface Mount Technology, vol. 34 no. 2
Type: Research Article
ISSN: 0954-0911

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