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The purpose of this paper is to design and implement a fully integrated low‐phase noise and large tuning range dual‐band LC voltage‐controlled oscillator (VCO) in 0.13 μm complementary metal oxide semiconductor (CMOS) technology.

Two parallel‐connected single‐band VCOs are designed to implement the proposed VCO. Adopting a simple and straight‐forward architecture, the dual‐band VCO is configured to operate at two frequency bands, which are from 1.48 GHz to 1.78 GHz and from 2.08 GHz to 2.45 GHz. A band selection circuit is designed to perform band selection process based on the controlling input signal.

The proposed VCO features phase noise of −104.7 dBc/Hz and −108.8 dBc/Hz at 1 MHz offset frequency for both low corner and high corner end of the low‐band operation. For high‐band operation, phase‐noise performance of −101.1 dBc/Hz and −110.4 dBc/Hz at 1 MHz offset frequency are achieved. The measured output power of the dual‐band VCO ranges from −8.4 dBm to −5.8 dBm and from −9.6 dBm to −8.0 dBm for low‐band and high‐band operation, respectively. It was also observed that the power differences between the fundamental spectrum and the nearby spurious tone range from −67.5 dBc to −47.7 dBc.

The paper is useful to both the academic and industrial fields since it promotes the concept of multi‐band or multi‐standard system which is currently in demand in the telecommunication industry.

The purpose of this paper is to present the high-frequency performance of 0.13-μm n-type metal-oxide-semiconductor (NMOS) transistors with various multi-finger configurations for implementation in millimeter-wave (mm-wave) frequency.

A folded-like double-gate transistor layout is designed to enable the transistor to work in the mm-wave region. Different sizes of transistors with variation in finger width (W_F) and number of fingers (N_F) were fabricated to determine the optimum size of the transistor. The extrinsic parasitic elements of selected transistors were extracted and investigated. The radio frequency (RF) performance of these samples were then analyzed and compared.

The proposed layout performed well with the highest maximum oscillation frequency (f_max) achieved at 122 GHz. Based on the comparison done, the optimum W_F obtained for the layout is at 2.0 μm. It is found that the extrinsic parasitic capacitance is more dominant than the parasitic resistance in affecting the f_max. In s-parameter analysis, it is observed that the transistor with the least N_F has smaller variance in small-signal gain throughout the measurement frequency. The maximum stable gain for the samples is also found to be roughly similar and independent of N_F.

A new layout structure for an NMOS transistor that works in mm-wave frequency is proposed. Experimental analyses presented here cover for both N_F and W_F, unlike others which focus on either N_F or W_F only.