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Article
Publication date: 10 August 2020

Nandha Gopal J. and Muthuselvan N.B.

The purpose of this paper is to enhance the response of quadratic boost converter inverter system (QBCIS) and also investigate proportional integral (PI) and fractional order…

244

Abstract

Purpose

The purpose of this paper is to enhance the response of quadratic boost converter inverter system (QBCIS) and also investigate proportional integral (PI) and fractional order proportional integral derivative (FOPID)-based space vector modulation inverter (SVMI) systems.

Design/methodology/approach

This paper presents modern expansion in control methods and power electronics have created wind-based AC to AC converters that relays to AC drives. The process includes the flow of quadratic boost converter (QBC) and SVMI locate their technique in associating permanent magnet synchronous generator and three phase load. This effort conveys with digital simulation using MATLAB/Simulink and hardware implementation of current mode wind-based QBCIS.

Findings

The direct current (DC) output from the rectifier is boosted using Quadratic Boost Converter (QBC). The DC yield of QBC is provided to the SVMI. The alternating current (AC) yield voltage is attained by using three-phase filter. The investigations are done with PI and FOPID-based SVMI systems. Current mode FOPID control is proposed to improve the time response of QBCIS system.

Originality/value

The simulation results are compared with the hardware results of QBCIS. The results of the comparison of PI with FOPID controlled by converters are made to show the improvement in terms of settling time and steady-state error.

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Article
Publication date: 29 July 2022

Saravanan N. and Hosimin Thilagar S.

The purpose of this paper rapid development of various voltage sag compensation techniques in DC bus using ultra-capacitors (UCs) provides satisfactory results when compared with…

34

Abstract

Purpose

The purpose of this paper rapid development of various voltage sag compensation techniques in DC bus using ultra-capacitors (UCs) provides satisfactory results when compared with required peak power demand for shorter duration. Later, UCs have been used as floating capacitors [1] [2]. Various UCs are available based on internal resistances which also rely on its manufacturing materials, similar to double layer capacitors.

Design/methodology/approach

This paper demonstrates UCs based voltage sag compensation at load side under different working modes of hydraulic pack (HP) in an armored fighting vehicle (AFV). The main sources to supply the HP are 24 V, 400 Ahr battery bank and 20 kW main generator. HP is considered to be the highest power load of a system. 2,500 A inrush current was drawn by HP during initial conditions, and also, this system works in both elevation and azimuth mode. Voltage sag has been varied from 15 to 24 V for different modes. But as per the military standard, electrical systems should operate between 18 and 32 V DC. Because of insufficient terminal voltage, required energy cannot be attained and supplied to the loads. The proposed topology compensated the voltage sag and maintains nominal voltage on a DC bus. The devised circuit has been verified under all possible operating loads such as continuous, intermittent and momentary. The same has been simulated using MATLAB/Simulink and was experimentally verified. The minimum voltage maintained in a DC bus is 22.2 V in simulation, while experimentally, it was 24.2 V.

Findings

For getting higher percentage of efficiency, secondary energy system configuration, mainly designed for electrical vehicles, is needed. It was implemented and same was tested with the fighting vehicle system[1]. The proposed configuration comprises of bank of an UC and a battery bank. The system was finally implemented in AFVs.

Originality/value

The goods vehicles made of UCs can hold very minimum energy because of minimum density of energy. The modified AFV can have minimum charging as well as discharging of rate of energy and, thus, power[3][4]. Thus, the proposed idea of modified vehicle system has influence over significant change in the state of charge.

Details

Circuit World, vol. 49 no. 2
Type: Research Article
ISSN: 0305-6120

Keywords

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Article
Publication date: 6 February 2024

Alireza Goudarzian and Rohallah Pourbagher

Conventional isolated dc–dc converters offer an efficient solution for performing voltage conversion with a large improved voltage gain. However, the small-signal analysis of…

67

Abstract

Purpose

Conventional isolated dc–dc converters offer an efficient solution for performing voltage conversion with a large improved voltage gain. However, the small-signal analysis of these converters shows that a right-half-plane (RHP) zero appears in their control-to-output transfer function, exhibiting a nonminimum-phase stability. This RHP zero can limit the frequency response and dynamic specifications of the converters; therefore, the output voltage response is sluggish. To overcome these problems, the purpose of this study is to analyze, model and design a new isolated forward single-ended primary-inductor converter (IFSEPIC) through RHP zero alleviation.

Design/methodology/approach

At first, the normal operation of the suggested IFSEPIC is studied. Then, its average model and control-to-output transfer function are derived. Based on the obtained model and Routh–Hurwitz criterion, the components are suitably designed for the proposed IFSEPIC, such that the derived dynamic model can eliminate the RHP zero.

Findings

The advantages of the proposed IFSEPIC can be summarized as: This converter can provide conditions to achieve fast dynamic behavior and minimum-phase stability, owing to the RHP zero cancellation; with respect to conventional isolated converters, a larger gain can be realized using the proposed topology; thus, it is possible to attain a smaller operating duty cycle; for conventional isolated converters, transformer core saturation is a major concern, owing to a large magnetizing current. However, the average value of the magnetizing current becomes zero for the proposed IFSEPIC, thereby avoiding core saturation, particularly at high frequencies; and the input current of the proposed converter is continuous, reducing input current ripple.

Originality/value

The key benefits of the proposed IFSEPIC are shown via comparisons. To validate the design method and theoretical findings, a practical implementation is presented.

Details

Circuit World, vol. 50 no. 2/3
Type: Research Article
ISSN: 0305-6120

Keywords

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Article
Publication date: 10 November 2021

Alireza Goudarzian

Control-signal-to-output-voltage transfer function of the conventional boost converter has at least one right-half plane zero (RHPZ) in the continuous conduction mode which can…

126

Abstract

Purpose

Control-signal-to-output-voltage transfer function of the conventional boost converter has at least one right-half plane zero (RHPZ) in the continuous conduction mode which can restrict the open-loop bandwidth of the converter. This problem can complicate the control design for the load voltage regulation and conversely, impact on the stability of the closed-loop system. To remove this positive zero and improve the dynamic performance, this paper aims to suggest a novel boost topology with a step-up voltage gain by developing the circuit diagram of a conventional boost converter.

Design/methodology/approach

Using a transformer, two different pathways are provided for a classical boost circuit. Hence, the effect of the RHPZ can be easily canceled and the voltage gain can be enhanced which provides conditions for achieving a smaller working duty cycle and reducing the voltage stress of the power switch. Using this technique makes it possible to achieve a good dynamic response compared to the classical boost converter.

Findings

The observations show that the phase margin of the proposed boost converter can be adequately improved, its bandwidth is largely increased, due to its minimum-phase structure through RHPZ cancellation. It is suitable for fast dynamic response applications such as micro-inverters and fuel cells.

Originality/value

The introduced method is analytically studied via determining the state-space model and necessary criteria are obtained to achieve a minimum-phase structure. Practical observations of a constructed prototype for the voltage conversion from 24 V to 100 V and various load conditions are shown.

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