Xinxin Fu, Yanjun Chen, Minggang Sun and Tengjiang Yu
The service performance for colored asphalt pavement is inevitably affected by the addition of different colorants, especially the challenge of low temperature environment in cold…
Abstract
Purpose
The service performance for colored asphalt pavement is inevitably affected by the addition of different colorants, especially the challenge of low temperature environment in cold regions. Therefore, the purpose of study is to explore the effects of different colorants on the service performance for colored asphalt pavement and to provide a foundation for improving the applicability of colored asphalt pavement in cold regions.
Design/methodology/approach
In the study, three kinds of colorants (iron oxide red, iron oxide yellow, iron oxide green) were used to compare the influence of different colorants amounts and different colorants kinds on the service performance for colored asphalt pavement in cold regions. According to the characteristics of low temperature in cold regions, the effects of different colorants on the low temperature performance for colored asphalt pavement were studied.
Findings
The study shows that different colorants have different effects on the service performance of colored asphalt pavement. The high temperature performance increases with the increase of the colorants amount, but the low temperature performance is opposite. Additionally, the yellow colored asphalt pavement has more advantages of low temperature adaptation than the red and green colored asphalt pavement.
Originality/value
The study results provide a certain theoretical foundation for the application of colored asphalt pavement in cold regions and have certain value and significance for the further development of colored asphalt pavement.
Details
Keywords
Chen Kuilin, Feng Xi, Fu Yingchun, Liu Liang, Feng Wennan, Jiang Minggang, Hu Yi and Tang Xiaoke
The data protection is always a vital problem in the network era. High-speed cryptographic chip is an important part to ensure data security in information interaction. This paper…
Abstract
Purpose
The data protection is always a vital problem in the network era. High-speed cryptographic chip is an important part to ensure data security in information interaction. This paper aims to provide a new peripheral component interconnect express (PCIe) encryption card solution with high performance, high integration and low cost.
Design/methodology/approach
This work proposes a System on Chip architecture scheme of high-speed cryptographic chip for PCIe encryption card. It integrated CPU, direct memory access, the national and international cipher algorithm (data encryption standard/3 data encryption standard, Rivest–Shamir–Adleman, HASH, SM1, SM2, SM3, SM4, SM7), PCIe and other communication interfaces with advanced extensible interface-advanced high-performance bus three-level bus architecture.
Findings
This paper presents a high-speed cryptographic chip that integrates several high-speed parallel processing algorithm units. The test results of post-silicon sample shows that the high-speed cryptographic chip can achieve Gbps-level speed. That means only one single chip can fully meet the requirements of cryptographic operation performance for most cryptographic applications.
Practical implications
The typical application in this work is PCIe encryption card. Besides server’s applications, it can also be applied in terminal products such as high-definition video encryption, security gateway, secure routing, cloud terminal devices and industrial real-time monitoring system, which require high performance on data encryption.
Social implications
It can be well applied on many other fields such as power, banking, insurance, transportation and e-commerce.
Originality/value
Compared with the current strategy of high-speed encryption card, which mostly uses hardware field-programmable gate arrays or several low-speed algorithm chips through parallel processing in one printed circuit board, this work has provided a new PCIe encryption card solution with high performance, high integration and low cost only in one chip.