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The purpose of this paper is to develop a method for multiple soft fault diagnosis of nonlinear circuits including fault detection, identification of faulty elements and estimation of their values in real circumstances.

The method for fault diagnosis proposed here uses a measurement test leading to a system of nonlinear equations expressing the measured quantities in terms of the circuit parameters. Nonlinear functions, which appear in these equations are not given in explicit analytical form. The equations are solved using a homotopy concept. A key problem of the solvability of the equations is considered locally while tracing the solution path. Actual faults are selected on the basis of the observation that the probability of faults in fewer number of elements is greater than in a larger number of elements.

The results indicate that the method is an effective tool for testing nonlinear circuits including bipolar junction transistors and junction field effect transistors.

The homotopy method is generalized and associated with a restart procedure and a numerical algorithm for solving differential equations. Testable sets of elements are found using the singular value decomposition. The procedure for selecting faulty elements, based on the minimal fault number rule, is developed. The method comprises both theoretical and practical aspects of fault diagnosis.

Analysis of piecewise linear resistive networks, described by nodal equations, using the Gauss‐Seidel method is presented in the paper. The conditions which guarantee the existence of a unique solution and convergence of the iterative technique are formulated. An algorithm is described and a numerical example is demonstrated.

The purpose of this paper is to develop a method for finding all the DC solutions in nonlinear circuits with the thermal constraint.

The proposed approach employs an algorithm for finding all the DC solutions without thermal constraint, including a new contraction and elimination method, an efficient method for tracing characteristics expressing voltages and power in terms of temperature, and electrical analog of the chip thermal behavior.

The paper brings a method that guarantees finding all the DC solutions, considering thermal behavior of the chip, in mid‐scale practical transistor circuits.

A new contraction and elimination method, being the core of the algorithm for finding all the DC solutions, is proposed. An approach enabling us to consider a feedback between the power dissipated inside the chip and the temperature, which affects the circuit parameters and consequently the solutions is developed.

For each natural n let Fⁿ denote the collection of mappings of Rⁿ onto itself defined by: F ∈Fⁿ if and only if there exist n strictly monotone increasing functions f_k mapping R onto itself such that for each x =[x₁, …, x_n]^T ∈ Rⁿ, F(x) = [f₁(x₁), …, f_n(x_n)]^T. The following new property of the class P₀ of matices is proved: a real n × n matrix A belongs to P₀ if and only if for every G, H ∈ Fⁿ the set S₀ = { x ∈ Rⁿ : − G(x) ≤Ax ≤ − H(x) } is bounded. As an illustration of this property a method of estimating the unique solution of the nonlinear equation F(x) + A(x) =b describing the large class of DC transistor circuits is developed. This can improve the efficiency of known computation algorithms. Numerical examples of transistor circuits illustrate in detail how the method works in practice.

Dynamic non‐linear circuits driven by DC voltage and current sources are considered in the paper. The problem of identification of asymptotically stable equilibrium states is analyzed. The circuits are studied where there is a one‐to‐one correspondence between each operating point of a DC model of a dynamic circuit and equilibrium state of the dynamic circuit. A method is developed, based on quantities concerning resistive circuits only, enabling us to select some of the operating points being asymptotically stable equilibrium states. It is shown that these operating points are asymptotically stable equilibrium states of some class of dynamic circuits which differ one from another in characteristics of the capacitors and inductors. The approach is illustrated by a numerical example.

By a polyhedral or piecewise‐linear configuration in Rⁿ we mean the finite union of finite intersections of open or closed halfspaces. It is proved that every such configuration can be characterized by the single algebraic‐like equation involving only addition, subtraction, multiplication, absolute value and signum operators. Next, all such simplest implicit characterizations are found for idealized diodes, the ideal step function and the hysteresis function. Finally, the one‐dimensional infinite potential trough is analysed and the obtained equations are conjectured to be the simplest possible. All this allows among others to describe systems containing piecewise‐linear elements in a compact form suitable for further analytic studies.

Showing both theoretically and experimentally that the Newton‐Raphson algorithm is a very efficient tool for computing the transfer factor characteristic of AM detectors.

An equation which describes the diode and transistor AM detectors has been investigated. Using elementary techniques of mathematical analysis, some theoretical properties of the equation have been formulated and convergence of the Newton‐Raphson algorithm has been proved.

It is shown that the Newton‐Raphson algorithm is an efficient tool for tracing the transfer factor characteristics of both diode and transistor AM detector. The convergence of this algorithm is proved and a comparison with SPICE simulation is made. Furthermore, the diode and transistor AM detectors have been built up and validating measurements have been carried out. The comparison shows that the algorithm proposed in the paper computes the characteristics fast achieving good accuracy.

The results obtained are limited to those described in the paper diode and transistor AM detectors.

Some properties of the nonlinear equation describing the AM detectors are formulated and convergence of the Newton‐Raphson algorithm to a unique solution is proved.

The purpose of this paper is to define the process of analog circuit optimization on the basis of the control theory application. This approach produces many different strategies of optimization and determines the problem of searching of the best strategy in sense of minimal computer time. The determining of the best strategy of optimization and a searching of possible structure of this strategy with a minimal computer time is a principal aim of this work.

Different kinds of strategies for circuit optimization have been evaluated from the point of view of operations’ number. The generalized methodology for the optimization of analog circuit was formulated by means of the optimum control theory. The main equations for this methodology were elaborated. These equations include the special control functions that are introduced artificially. This approach generalizes the problem and generates an infinite number of different strategies of optimization. A problem of construction of the best algorithm of optimization is defined as a typical problem of the control theory. Numerical results show the possibility of application of this approach for optimization of electronic circuits and demonstrate the efficiency and perspective of the proposed methodology.

Examples show that the better optimization strategies that are appeared in limits of developed approach have a significant time gain with respect to the traditional strategy. The time gain increases when the size and the complexity of the optimized circuit are increasing. An additional acceleration effect was used to improve the properties of presented optimization process.

The obtained results show the perspectives of new approach for circuit optimization. A large set of various strategies of circuit optimization serves as a basis for searching the better strategies with a minimum computer time. The gain in processor time for the best strategy reaches till several thousands in comparison with traditional approach.

This paper aims to propose a new approach on the problem of circuit optimisation by using the generalised optimisation methodology presented earlier. This approach is focused on the application of the maximum principle of Pontryagin for searching the best structure of a control vector providing the minimum central processing unit (CPU) time.

The process of circuit optimisation is defined mathematically as a controllable dynamical system with a control vector that changes the internal structure of the equations of the optimisation procedure. In this case, a well-known maximum principle of Pontryagin is the best theoretical approach for finding of the optimum structure of control vector. A practical approach for the realisation of the maximum principle is based on the analysis of the behaviour of a Hamiltonian for various strategies of optimisation and provides the possibility to find the optimum points of switching for the control vector.

It is shown that in spite of the fact that the maximum principle is not a sufficient condition for obtaining the global minimum for the non-linear problem, the decision can be obtained in the form of local minima. These local minima provide rather a low value of the CPU time. Numerical results were obtained for both a two-dimensional case and an N-dimensional case.

The possibility of the use of the maximum principle of Pontryagin to a problem of circuit optimisation is analysed systematically for the first time. The important result is the theoretical justification of formerly discovered effect of acceleration of the process of circuit optimisation.

Controlled vocabularies play an important role in information retrieval. Numerous studies have shown that conceptual searches based on vocabularies are more effective than keyword searches, at least in certain contexts. Consequently, new ways must be found to improve controlled vocabularies. The purpose of this paper is to present a semi-automatic model for updating controlled vocabularies through the use of a text corpus and the analysis of query logs.

An experimental development is presented in which, first, the suitability of a controlled vocabulary to a text corpus is examined. The keywords entered by users to access the text corpus are then compared with the descriptors used to index it. Finally, both the query logs and text corpus are processed to obtain a set of candidate terms to update the controlled vocabulary.

This paper describes a model applicable both in the context of the text corpus of an online academic journal and to repositories and intranets. The model is able to: first, identify the queries that led users from a search engine to a relevant document; and second, process these queries to identify candidate terms for inclusion in a controlled vocabulary.

Ideally, the model should be used in controlled web environments, such as repositories, intranets or academic journals.

The proposed model directly improves the indexing process by facilitating the maintenance and updating of controlled vocabularies. It so doing, it helps to optimise access to information.

The proposed model takes into account the perspective of users by mining queries in order to propose candidate terms for inclusion in a controlled vocabulary.