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To give an overview of the issues encountered, and changes that need to be made in the various types of soldering process when converting them from conventional to lead‐free assembly.

This paper has been written to provide a review of the lead‐free reflow, wave and hand soldering processes. Problem areas highlighted and methods for adjusting and optimising each type of soldering process for compatibility with lead‐free solders are described.

The move to lead‐free soldering in electronics assembly can lead to a number of issues that affect process performance, yields and reliability. Problems that are sometimes encountered with conventional lead‐bearing solders can exacerbated when moving to lead‐free. Many of the issues are associated with the higher melting points of the recommended lead‐free solders. Fortunately, these issues are now well known and, with care and attention to process optimisation, they can largely be avoided.

The value of the paper lies in its ability to provide information on the types of problems and issues encountered when moving to lead‐free solders and the advice it gives on how to avoid them. It also describes how to convert the various lead‐free soldering processes used in PCB assembly using a range of measures that can minimise defects, avoid common problems and optimise yields. Sources of additional assistance are also identified.

This paper will describe tests of the interconnect reliability of BGA components with tin‐lead bumps soldered with lead‐free solder paste during temperature cycling. Tin‐lead BGA components soldered with tin‐lead solder paste and lead‐free BGA components soldered with lead‐free solder paste were used as a reference. The lead‐free solder used was eutectic tin‐silver‐copper. Two kinds of surface finishes were used on the printed circuit boards (PCB), an immersion gold over electroless nickel and an organic solderability preservative. The test PCBs were temperature‐cycled for 2500 cycles in the range of −40°C to +125°C and they were continuously electrically monitored during the cycling. The results of the temperature cycling test showed that lead‐ containing BGA components soldered with lead‐free solder paste don't show any serious reliability risks and can actually withstand temperature cycling stresses better than entirely lead‐free BGA assemblies.

The purpose of this paper is to describe the board level reliability test results of four IC packages with lead‐free balls/platings, soldered with lead‐free solder paste, during thermal cycling. The board level reliability test results of tin‐lead balled/plated packages soldered with lead‐free solder paste have also been included for comparison.

Four different packages, i.e. ball grid array (BGA), chip scale package (CSP), quad flat package (QFP) and thin small outline package (TSOP), were assembled on a test printed circuit board (PCB) as the test vehicle. Lead‐free and tin‐lead BGA/CSP packages were equipped with Sn‐3.0Ag‐0.5Cu and Sn‐37Pb solder balls, respectively. The lead‐frames of lead‐free QFP/TSOP leaded‐packages were plated with Sn‐58Bi and those of tin‐lead QFP/TSOP leaded‐packages, Sn‐37Pb. The lead‐free solder paste used in this study was Sn‐3.0Ag‐0.5Cu. Two kinds of surface finishes, immersion gold over electroless nickel (Au/Ni) and organic solderability preservative, were used on the PCBs. The test PCBs were thermal cycled 5,000 times within the temperature range of −40 to 125°C and electrically monitored during the thermal cycling.

It was found that the tin‐lead balled/plated BGAs, CSPs, QFPs and TSOPs soldered with lead‐free solder paste showed serious board level reliability risks as their abilities to withstand thermal cycling stresses are much weaker than those of entirely lead‐free assemblies. Neither package nor surface finish was found to have any effects on the board level reliability of test vehicles with lead‐free balled/plated BGAs, CSPs, QFPs and TSOPs. Metallographic examinations were conducted to investigate the effect of thermal cycling on the failure modes of solder joints.

The paper is of value by contributing to research in the use of lead‐free solder paste with lead‐containing packages in the industry. Currently, there is a deficiency of knowledge in this area.

The High Density Packaging Users Group Consortium has conducted a study of process development and solder‐joint reliability of high‐density packages on printed circuit boards (PCB) using a low‐melting temperature lead‐free solder. The purpose of this paper is to investigate the reliability tests (e.g. temperature cycling and shock and vibration) and failure analysis (FA) of high‐density packages on PCB with the low‐melting temperature lead‐free solder (Sn‐57 wt%Bi‐1 wt%Ag).

The design for reliability, materials, and assembly process aspects of the project have been discussed in “Design, materials, and assembly process of high‐density packages with a low‐temperature lead‐free solder (SnBiAg)” also published in this journal issue. In this study, reliability tests (e.g. temperature cycling and shock and vibration) and FA of high‐density packages on PCB with the low‐melting temperature lead‐free solder (Sn‐57 wt%Bi‐1 wt%Ag) are investigated.

Lead‐free solder‐joint reliability of high‐density packages, such as the PBGA388, PBGA256, PBGA208, PBGA196, PBGA172, PQFP80, and TSSOP56 were determined by temperature cycling, shock, and vibration tests. Temperature cycling test data for over 8,100 cycles between 0 and 100°C in a 44 min. cycle were statistically analyzed. Shock and vibration test data based on the HP Standard Class Bi‐II Products SPEC have also been reported.

Currently there is a lack of experimental and simulation data and field experience in respect of one of the critical issues for industry – that of solder joint reliability in lead‐free soldering. The paper contains some important research results and recommendations.

Over the last few years, the emergence of new European draft legislation has focussed electronics industry attention on the likely ultimate proscription of lead in electronics assembly. Much work has already been undertaken to identify the possible alternatives to conventional tin‐lead solders and to evaluate their performance benefits and limitations in comparison with the traditional materials. Although, some companies are already offering products manufactured using lead‐free products, there is still a widespread lack of activity in many areas. With this none‐too‐distant deadline rapidly approaching, Envirowise has sponsored this paper as part of its coordinated activities to assist the UK electronics industry and to promote environmental efficiency and best practice. This paper details the current situation with respect to the drivers towards the adoption of lead‐free assembly before giving an overview of the current situation. This paper concludes with details of sources of further information.

The electronics industry will implement lead‐free soldering in the near future. Lead‐free implementation steps are divided into lead‐free process and lead‐free product. The eutectic Sn/Ag/Cu alloy seems to have become the most widely used alloy in the implementation of lead‐free processes. In this study, the requirements for component placement are discussed from the lead‐free process point of view. Experiments concerning the self‐alignment capability and tack strength of both tin‐lead and lead‐free solder pastes are presented. According to the results, a bigger variation in self‐alignment capabilities can be expected when using a lead‐free paste. The paste properties affecting the self‐alignment mechanism and tack strength are also discussed.

Historically, tin‐lead solder has been a commonly used joining material in electronics manufacturing. Environmental and health concerns, due to the leaching of lead from landfills into ground water, have necessitated legislation that restricts the use of lead in electronics. The transition from tin‐lead solder to a lead‐free solder composition is imminent. Several alternative solder alloys (and their fluxes) have been researched for electronics assembly in the last few years. The objective of this research was to develop a systematic selection process for choosing a “preferred” lead‐free solder paste, based on its print and reflow performance.

After a detailed study of industry preferences, published experimental data, and recommendations of various industrial consortia, a near eutectic tin‐silver‐copper (SAC) composition was selected as the preferred alloy for evaluation. Commercially available SAC solder pastes with a no‐clean chemistry were extensively investigated in a simulated manufacturing environment. A total of nine SAC pastes from seven manufacturers were evaluated in this investigation. A eutectic Sn/Pb solder paste was used as a baseline for comparison. While selecting the best lead‐free paste, it was noted that the selected paste has to perform as good as, if not better than, the current tin‐lead paste configuration used in electronics manufacturing for a particular application. The quality of the solder pastes was characterized by a series of analytical and assembly process tests consisting of, but not limited to, a printability test, a solder ball test, a slump test, and post reflow characteristics such as the tendency to form voids, self‐centring and wetting ability.

Each paste was evaluated for desirable and undesirable properties. The pastes were then scored relative to each other in each individual test. An aggregate of individual test scores determined the best paste.

This paper summarizes a systematic approach adopted to evaluate lead‐free solder pastes for extreme reflow profiles expected to be observed in reflow soldering lead‐free boards.

This paper aims to describe and document the application of commonly utilized solder joint failure analysis techniques to lead‐free solder joints.

Traditional failure analysis techniques, including visual inspection, X‐ray radiography, mechanical strength testing, dye and pry, metallography, microscopy and photomicrography, are reviewed. These techniques are demonstrated as applied to lead‐free and tin lead solder joints. Common failure modes observed in lead‐free and tin lead solder joints are described and compared.

It is shown that the traditional failure analysis techniques previously utilized for tin lead solder joints are widely applicable to the analysis of lead‐free solder joints. The changes required to effectively apply these techniques to the analysis of lead‐free solder joints are described.

This paper will be instrumental to the process, quality, reliability and failure analysis engineering disciplines in furthering understanding of the application of failure analysis techniques of both tin lead and lead‐free solder joints.

The High Density Packaging Users Group conducted a substantial study of the solder joint reliability of high‐density packages using lead‐free solder. The design, material, and assembly process aspects of the project are addressed in this paper. The components studied include many surface mount technology package types, various lead, and printed circuit board finishes and paste‐in‐hole assembly.

The purpose of this paper is to investigate the effects of H2 flow rate on improving the solder wettability of oxidized‐copper with liquid lead‐free solder (96.5Sn‐3Ag‐0.5Cu) by Ar‐H2 plasmas. The aim was to improve the solder wettability of oxidized copper from 0 per cent wetting of copper oxidized in air at 260^oC for 1 hour to 100 per cent wetting of oxidized‐copper modified by Ar‐H2 plasmas at certain H2 flow rates and to find correlations between the surface characteristics of copper and the solder wettability with liquid lead‐free solder.

To reduce the copper oxides on the surfaces of oxidized‐copper for improving solder wettability with liquid lead‐free solder, this study attempted to apply Ar‐H2 plasmas to ablate the copper oxides from the surfaces of oxidized‐copper by the physical bombardment of the Ar plasmas and to reduce the surfaces of oxidized‐copper by the chemical reaction of H2 plasmas with the surfaces of oxidized‐copper.

The solder wettability of oxidized‐copper was found to be highly dependent on the surface characteristics of the copper. The values of polar surface free energy and dispersive surface free energy on the surfaces of oxidized‐copper modified by Ar‐H2 plasmas were close to those values of solid lead‐free solder, which resulted in improved solder wettability with liquid lead‐free solder. Auger spectra indicated that the Ar‐H2 plasma modification was used to remove the copper oxides from the surfaces of oxidized‐copper.

The surface characterization of copper surfaces is typically determined by expensive surface analysis tool such as Auger Electron Spectroscopy (AES). This paper reports the results of a study of a promising technique called the sessile drop test method, for examining the surface free energies such as total surface free energy, polar surface free energy and dispersive surface free energy on the surfaces of copper to clarify how the solder wettability of oxidized‐copper with liquid lead‐free solder was enhanced by Ar‐H2 plasmas.