Chern Sheng Lin, Chang-Yu Hung, Chung Ting Chen, Ke-Chun Lin and Kuo Liang Huang
This study aims to present an optical alignment and compensation control of die bonder for chips containing through-silicon vias and develop three-dimensional integrated circuit…
Abstract
Purpose
This study aims to present an optical alignment and compensation control of die bonder for chips containing through-silicon vias and develop three-dimensional integrated circuit stacked packaging for compact size and multifunction.
Design/methodology/approach
The machine vision, optical alignment method and sub-pixel technology in dynamic imaging condition are used. Through a comparison of reference image, the chip alignment calibration can improve machine accuracy and stability.
Findings
According to the experimental data and preliminary results of the analysis, accuracy can be achieved within the desired range, and the accuracy is much better than traditional die bonder equipment. The results help further research in die bonder for chips containing through-silicon vias.
Originality/value
In subsequent testing of the chip, the machine can simultaneously test multiple chips to save test time and increase productivity.