Maogong Jiang, Guicui Fu, Bo Wan, Peng Xue, Yao Qiu and Yanruoyue Li
The purpose of this paper is to present a failure analysis of the solder layer in a Darlington power transistor in a TO-3 package.
Abstract
Purpose
The purpose of this paper is to present a failure analysis of the solder layer in a Darlington power transistor in a TO-3 package.
Design/methodology/approach
A failed Darlington power transistor in a TO-3 package was examined by different kinds of failure analysis techniques. At first, internal gas analysis was conducted to measure the atmosphere. Then, scanning acoustic microscopy (SAM) was performed to check the quality of the solder layers in the failed device, and the failure location was determined in the solder layer between chip and substrate. Next, the failed device was decapped to observe the defects. After removing the chip from the substrate, energy dispersive spectroscopy (EDS) and X-ray photoelectron spectroscopy (XPS) were applied and the main elemental composition of the solder layer was identified.
Findings
Internal gas analysis indicated that the moisture and oxygen contents exceeded the allowed maximum value. Large areas of voids were found in the solder layer by SAM. The main elemental compositions of the solder layer were identified by scanning electron microscopy and EDS. Furthermore, the valences of the chemical components in the solder layer were identified by XPS. Except for the few simple substances of the initial solder material, the chemical formulae of oxidation products in the solder layer were deduced. In addition, the root causes are also discussed.
Originality/value
This paper focuses on the solder layer failure of a power transistor. Factors such as the presence of oxygen, voids and other factors, which can cause transistor damage, were comprehensively analyzed. The analysis process is worth learning from and the results can be used to improve the reliability of power devices in this kind of package.
Details
Keywords
Yanruoyue Li, Guicui Fu, Bo Wan, Zhaoxi Wu, Xiaojun Yan and Weifang Zhang
The purpose of this study is to investigate the effect of electrical and thermal stresses on the void formation of the Sn3.0Ag0.5Cu (SAC305) lead-free ball grid array (BGA) solder…
Abstract
Purpose
The purpose of this study is to investigate the effect of electrical and thermal stresses on the void formation of the Sn3.0Ag0.5Cu (SAC305) lead-free ball grid array (BGA) solder joints and to propose a modified mean-time-to-failure (MTTF) equation when joints are subjected to coupling stress.
Design/methodology/approach
The samples of the BGA package were subjected to a migration test at different currents and temperatures. Voltage variation was recorded for analysis. Scanning electron microscope and electron back-scattered diffraction were applied to achieve the micromorphological observations. Additionally, the experimental and simulation results were combined to fit the modified model parameters.
Findings
Voids appeared at the corner of the cathode. The resistance of the daisy chain increased. Two stages of resistance variation were confirmed. The crystal lattice orientation rotated and became consistent and ordered. Electrical and thermal stresses had an impact on the void formation. As the current density and temperature increased, the void increased. The lifetime of the solder joint decreased as the electrical and thermal stresses increased. A modified MTTF model was proposed and its parameters were confirmed by theoretical derivation and test data fitting.
Originality/value
This study focuses on the effects of coupling stress on the void formation of the SAC305 BGA solder joint. The microstructure and macroscopic performance were studied to identify the effects of different stresses with the use of a variety of analytical methods. The modified MTTF model was constructed for application to SAC305 BGA solder joints. It was found suitable for larger current densities and larger influences of Joule heating and for the welding ball structure with current crowding.