Search results
1 – 10 of 14Eric Beyne, Rita Van Hoof, Tomas Webers, Steven Brebels, Stéphanie Rossi, François Lechleiter, Marianna Di Ianni and Andreas Ostmann
A novel interconnect technology, introducing thin film on a laminate substrate base, is presented. A specially constructed laminate board is used as a substrate for the thin film…
Abstract
A novel interconnect technology, introducing thin film on a laminate substrate base, is presented. A specially constructed laminate board is used as a substrate for the thin film build‐up process. The main characteristics of the laminate core substrate are the z‐axis electrical connections, the absence of holes in the substrate and the very flat nature of the top surface. As a result, the base substrate can be processed further in a thin film processing line. The manufacturing and properties of these substrates are discussed.
Details
Keywords
Philip Pieters, Walter De Raedt and Eric Beyne
The thin film multilayer multichip module technology (MCM‐D) was originally used for the interconnection of high speed digital circuits in a single module. Nowadays, the…
Abstract
The thin film multilayer multichip module technology (MCM‐D) was originally used for the interconnection of high speed digital circuits in a single module. Nowadays, the technology is more and more evolving towards use in the interconnection of RF and microwave circuits with integrated passive components. This paper gives an overview of this evolution towards microwave MCM‐D technology and the recent advances with respect to the integration of high quality passive components. With a discussion on the flip chip mounting of active devices, the link towards fully integrated high frequency front‐end systems is pointed out.
Details
Keywords
Bart Vandevelde and Eric Beyne
Presents the thermo‐mechanical modelling of a new type of area array package: the flip chip on polymer stud grid array (PSGA). The objective is to optimise the material and…
Abstract
Presents the thermo‐mechanical modelling of a new type of area array package: the flip chip on polymer stud grid array (PSGA). The objective is to optimise the material and geometrical design of this PSGA package and the flip chip assembly in order to achieve the highest thermal fatigue reliability for the solder joints in this structure. A parameterised non‐linear finite element model is used to calculate the inelastic strains induced in the solder joints due to thermal cycling. The techniques of design of experiments (DOE) and response surface modelling (RSM) enhance the parameter sensitivity analysis and optimisation of the PSGA design. After the optimisation of the structure, a very high solder joint fatigue reliability of this flip chip to PSGA package has been achieved.
Details
Keywords
Arun Chandrasekhar, Eric Beyne, Walter De Raedt, Bart Nauwelaers and Tania Van Bever
This paper highlights the electrical behaviour of the interconnects on a 120‐pin Ball Grid Array (BGA) package from 500 MHz upto 8 GHz. The measurements are made using IMEC's…
Abstract
This paper highlights the electrical behaviour of the interconnects on a 120‐pin Ball Grid Array (BGA) package from 500 MHz upto 8 GHz. The measurements are made using IMEC's MCM‐D thin film technology as the substrate and with a test set‐up called MoPoM (MCM‐on‐Package‐on‐MCM). The interconnects are classified based on length and measured with adjacent interconnects grounded as well as floating. Circuit models are extracted from the measurement and the simulation respectively for an RF interconnect including the wirebond. Comparison of the circuit models with each other and with the measurement show agreement atleast upto 6 GHz. One of the interconnects is also measured before and after globtopping and a considerable change in the impedance match is observed. The effect of package loading is found to be negligible.
Details
Keywords