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Palladium surface finishes are utilized on leadframes, printed wiring boards and automobile sensors. Their superior functional performance and the considerable environmental impact of plating lead‐free finishes for packaging processes have been increasingly recognized by the electronic industry. Wire bondable and solderable palladium finishes meet military and industrial standards at no extra cost in the overall assembly processes when compared to traditional packaging techniques. In addition to the development of palladium plating chemistries and technologies, the functional properties of the surface finishes including their wire bonding performance have also been investigated at Bell Laboratories. In this study, gold and aluminum wire bonding to palladium finishes was tested and the wire bond pull force and break position were examined in order to optimize the bonding processes. The results of the study are reported in this paper.

Two new electrolytically plated lead‐free surface finishes are evaluated for their wettability, bond strength, and voiding performance, and are compared with electrolytic nickel gold and an OSP. The results indicate that Ni–Sn achieve the highest wettability, one of the highest lap shear strengths, and the lowest levels of voiding. It also performs better under a long reflow profile. Under most instances, the soldering performance is comparable with, or better than, the reference OSP and Ni–Au surface finishes. Ni–PdCo–Au was found to give a poor wettability, fairly low lap shear strength, and have high levels of voiding. However, it is fairly stable, and its soldering performance is not sensitive to the reflow profile length or atmosphere, aging treatment, or flux chemistry. OSP was found to be the poorest in terms of wettability, but one of the best for lap shear strength. It also performs best under long profile, is not sensitive to reflow atmosphere, is slightly sensitive to alloy type, but is very sensitive to aging and flux chemistry.

To provide information about latest product developments to address and take away the fear of whisker formation on pure immersion tin surface finishes on PCBs.

This paper summarises the latest findings on whisker formation of pure tin surface finishes and describes an effective methodology for whisker suppression in combination with other benefits for the use of this new immersion tin generation.

Whisker formation is a typical feature of pure tin when coated, e.g. on copper and is a threat to the PCB industry, because of the risks of shortcuts involved. The main driving force for whiskers is an accumulation of internal stress created by diffusion at the boundary of copper and tin. A nano layer deposited from an organic metal‐based pre‐dip significantly reduces the diffusion by creating a unique sandwich layer with smooth concentration gradients. A drastic reduction of diffusion and stress was found, eliminating the driving force for whisker formation and prolonging the layer's shelf life and temperature stability at the same time.

Whenever whisker formation on immersion tin is regarded as a potential risk, e.g. by OEMs, a whisker‐reduced process is available and should be chosen to meet the market's specifications.

This paper takes the edge off the whisker threat discussions, leading to a hesitant implementation of immersion tin surface finish technology for PCBs, which disregard its excellent features with respect to future lead‐free soldering. Whisker‐reduced immersion tin is a viable and preferable alternative solderable surface finish for the lead‐free era.