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The present paper aims to propose a basic current mirror-sensing circuit as an alternative to the traditional Wheatstone bridge circuit for the design and development of high-sensitivity complementary metal oxide semiconductor (CMOS)–microelectromechanical systems (MEMS)-integrated pressure sensors.

This paper investigates a novel current mirror-sensing-based CMOS–MEMS-integrated pressure-sensing structure based on the piezoresistive effect in metal oxide field effect transistor (MOSFET). A resistive loaded n-channel MOSFET-based current mirror pressure-sensing circuitry has been designed using 5-μm CMOS technology. The pressure-sensing structure consists of three identical 10-μm-long and 50-μm-wide n-channel MOSFETs connected in current mirror configuration, with its input transistor as a reference MOSFET and output transistors are the pressure-sensing MOSFETs embedded at the centre and near the fixed edge of a silicon diaphragm measuring 100 × 100 × 2.5 μm. This arrangement of MOSFETs enables the sensor to sense tensile and compressive stresses, developed in the diaphragm under externally applied pressure, with respect to the input reference transistor of the mirror circuit. An analytical model describing the complete behaviour of the integrated pressure sensor has been described. The simulation results of the pressure sensor show high pressure sensitivity and a good agreement with the theoretical model has been observed. A five mask level process flow for the fabrication of the current mirror-sensing-based pressure sensor has also been described. An n-channel MOSFET with aluminium gate was fabricated to verify the fabrication process and obtain its electrical characteristics using process and device simulation software. In addition, an aluminium gate metal-oxide semiconductor (MOS) capacitor was fabricated on a two-inch p-type silicon wafer and its CV characteristic curve was also measured experimentally. Finally, the paper presents a comparative study between the current mirror pressure-sensing circuit with the traditional Wheatstone bridge.

The simulated sensitivities of the pressure-sensing MOSFETs of the current mirror-integrated pressure sensor have been found to be approximately 375 and 410 mV/MPa with respect to the reference transistor, and approximately 785 mV/MPa with respect to each other. The highest pressure sensitivities of a quarter, half and full Wheatstone bridge circuits were found to be approximately 183, 366 and 738 mV/MPa, respectively. These results clearly show that the current mirror pressure-sensing circuit is comparable and better than the traditional Wheatstone bridge circuits.

The concept of using a basic current mirror circuit for sensing tensile and compressive stresses developed in micro-mechanical structures is new, fully compatible to standard CMOS processes and has a promising application in the development of miniaturized integrated micro-sensors and sensor arrays for automobile, medical and industrial applications.

This paper aims to describe the fabrication and characterization of current mirror-integrated microelectromechanical systems (MEMS)-based pressure sensor.

The integrated pressure-sensing structure consists of three identical 100-µm long and 500-µm wide n-channel MOSFETs connected in a resistive loaded current mirror configuration. The input transistor of the mirror acts as a constant current source MOSFET and the output transistors are the stress sensing MOSFETs embedded near the fixed edge and at the center of a square silicon diaphragm to sense tensile and compressive stresses, respectively, developed under applied pressure. The current mirror circuit was fabricated using standard polysilicon gate complementary metal oxide semiconductor (CMOS) technology on the front side of the silicon wafer and the flexible pressure sensing square silicon diaphragm, with a length of 1,050 µm and width of 88 µm, was formed by bulk micromachining process using tetramethylammonium hydroxide solution on the backside of the wafer. The pressure is monitored by the acquisition of drain voltages of the pressure sensing MOSFETs placed near the fixed edge and at the center of the diaphragm.

The current mirror-integrated pressure sensor was successfully fabricated and tested using in-house developed pressure measurement system. The pressure sensitivity of the tested sensor was found to be approximately 0.3 mV/psi (or 44.6 mV/MPa) for pressure range of 0 to 100 psi. In addition, the pressure sensor was also simulated using Intellisuite MEMS Software and simulated pressure sensitivity of the sensor was found to be approximately 53.6 mV/MPa. The simulated and measured pressure sensitivities of the pressure sensor are in close agreement.

The work reported in this paper validates the use of MOSFETs connected in current mirror configuration for the measurement of tensile and compressive stresses developed in a silicon diaphragm under applied pressure. This current mirror readout circuitry integrated with MEMS pressure-sensing structure is new and fully compatible to standard CMOS processes and has a promising application in the development CMOS-MEMS-integrated smart sensors.

The purpose of this paper is to use finite element method for optimizing the membrane type double cavity vacuum sealed structure for the best achievable sensitivity in a piezoresistive absolute pressure sensor and its validation using a standard complementary metal oxide semiconductor (CMOS) process.

A double cavity vacuum sealed piezoresistive absolute pressure sensor has been simulated and optimized for its performance and an analytical model describing the behaviour of the sensor has been described. The 1×1 mm sensor chip has two membrane type 100×30×1.7 μm diaphragms consisting of composite layers of plasma enhanced chemical vapour deposition (PECVD) of silicon nitride (Si₃N₄) and silicon dioxide (SiO₂) each hanging over 21 μm deep rectangular cavity. Potassium hydroxide (KOH) based anisotropic etching of single crystal silicon using front side lateral etching technology is used for the fabrication of the sensor. The electrical readout circuitry uses 318 Ω boron diffused low pressure vapour chemical vapour deposition (LPCVD) of polysilicon resistors arranged in the Wheatstone half bridge configuration. The sensing structure is simulated and optimized using COMSOL Multiphysics.

Front-side lateral etching technology has been successfully used for the fabrication of double cavity absolute pressure sensor. A good agreement with the fabricated device for the chosen location of the piezoresistors through simulation has been predicted. The measured pressure sensitivity of two tested pressure sensors is 12.63 and 12.46 mV/MPa, and simulated pressure sensitivity is found to be 12.9 mV/MPa for pressure range of 0 to 0.5 MPa. The location of the piezoresistor has also been optimized using the simulation tools for enhancing the sensor sensitivity to 62.14 mV/MPa. The pressure sensitivity is further enhanced to 92 mV/MPa by increasing the width of the diaphragm to 35 μm.

The simulated and measured pressure sensitivities of the double cavity pressure sensor are in close agreement. Sevenfold enhancement in the pressure sensitivity of the optimized sensing structure has been observed. The proposed front-side lateral etching technology can be adopted for making membrane type diaphragms hanging over vacuum sealed micro-cavities for high sensitivity pressure sensing applications.

The purpose of this paper is to study the effect of alignment of conductive particles on the piezoresistivity of composite based on a theoretical model. The piezoresistivity of composite is associated with the characteristics of conductive network formed by the conductive particles distributed in the composite, which can be changed through aligning the conductive particles.

The orientations of the tunnel resistors formed by each two adjacent conductive particles are dependent on the aligned level of the conductive particles, and different orientations induce different deformations for a tunnel resistor under external strain, which determines the piezoresistivity of the composites. To investigate the resistance behavior of composites with various characteristics of conductive networks, a piezoresistivity model is developed in this paper by considering the aligned level of conductive particles.

The results obtained from the proposed piezoresistivity model indicate that the sensitivity and stability of composites can be enhanced through aligning the conductive particles. Also, the piezoresistivity of composites filled with randomly distributed conductive particles is isotropic, and it turns to be anisotropic when the conductive particles are aligned.

The change and its mechanism of the piezoresistivity upon the aligned level of conductive particles have been pointed out in this paper based on the proposed model. The achievement of this paper will help the people understand, predict and optimize the piezoresistivity of composites, and provide a new approach to design a strain sensor based on the piezoresistivity.

A low power flip-flop circuit is designed for energy-efficient devices. Digital sequential circuits are in huge demand because every processor has most of the parts of digital circuit. The sequential circuits consist of a basic data storing element, a latch is used to store single bit data. The flip-flop takes a sufficient portion of the total chip area and overall power consumption as well. This study aims to the low power energy-efficient applications like laptops, mobile phones and palmtops.

This paper proposes a new type of flip-flop that consists of the only 16 transistors with a single-phase clock. The flip-flop has two blocks, master and slave latch. In this design, the authors have focused on only master latch, which includes a level restoring circuit. It is used to help the master latch in data retention process. The latch circuit has two inverters in back-to-back arrangement. The proposed flip-flop is implemented on 65 nm complementary metal oxide semiconductor technology using Cadence Virtuoso environment and compared with other reported flip-flops.

The proposed flip-flop architecture outperformed the peak percentage, i.e. 79.25% as compared to transmission gate flip-flop and a minimum of 20.02% compared to 18 T true single phase clocking (TSPC) improvement in terms of power. It also improved C to Q delay and power delay product. In addition, by reducing the number of transistors the total area of the proposed flip-flop is reduced by a minimum of 13.76% with respect to 18TSPC and existing flip-flop. For reliability checking the Monte Carlo simulation is performed for thousand samples and it is compared with the recently reported 18TSPC flip-flop.

This work is tested by using a test circuit with a load capacitor of 0.2 fF. The proposed work uses a new topology to work as master-slave. Power consumption of this technique is very less and it is best suitable for low power applications. This circuit is working properly up to 2 GHz frequency.

This paper aims to describe the fabrication, packaging and testing of a resistive loaded p-channel metal-oxide-semiconductor field-effect transistor-based (MOSFET-based) current mirror-integrated pressure transducer.

Using the concept of piezoresistive effect in a MOSFET, three identical p-channel MOSFETs connected in current mirror configuration have been designed and fabricated using the standard polysilicon gate process and microelectromechanical system (MEMS) techniques for pressure sensing application. The channel length and width of the p-channel MOSFETs are 100 µm and 500 µm, respectively. The MOSFET M1 of the current mirror is the reference transistor that acts as the constant current source. MOSFETs M2 and M3 are the pressure-sensing transistors embedded on the diaphragm near the mid of fixed edge and at the center of the square diaphragm, respectively, to experience both the tensile and compressive stress developed due to externally applied input pressure. A flexible square diaphragm having a length of approximately 1,000 µm and thickness of 50 µm has been realized using deep-reactive ion etching of silicon on the backside of the wafer. Then, the fabricated sensor chip has been diced and mounted on a TO8 header for the testing with pressure.

The experimental result of the pressure sensor chip shows a sensitivity of approximately 0.2162 mV/psi (31.35 mV/MPa) for an input pressure of 0-100 psi. The output response shows a good linearity and very low-pressure hysteresis. In addition, the pressure-sensing structure has been simulated using the parameters of the fabricated pressure sensor and from the simulation result a pressure sensitivity of approximately 0.2283 mV/psi (33.11 mV/MPa) has been observed for input pressure ranging from 0 to 100 psi with a step size of 10 psi. The simulated and experimentally tested pressure sensitivities of the pressure sensor are in close agreement with each other.

This current mirror readout circuit-based MEMS pressure sensor is new and fully compatible to standard CMOS processes and has a promising application in the development CMOS-MEMS-integrated smart sensors.

The purpose of this study is to find a new design that can increase the sensitivity of the sensor without sacrificing the linearity. A novel and very efficient method for increasing the sensitivity of MEMS pressure sensor has been proposed for the first time. Rather than perforation, we propose patterned thinning of the diaphragm so that specific regions on it are thinner. This method allows the diaphragm to deflect more in response with regard to the pressure. The best excavation depth has been calculated and a pressure sensor with an optimal pattern for thinned regions has been designed. Compared to the perforated diaphragm with the same pattern, larger output voltage is achieved for the proposed sensor. Unlike the perforations that have to be near the edges of the diaphragm, it is possible for the thin regions to be placed around the center of the diaphragm. This significantly increases the sensitivity of the sensor. In our designation, we have reached a 60 per cent thinning (of the diaphragm area) while perforations larger than 40 per cent degrade the operation of the sensor. The proposed method is applicable to other MEMS sensors and actuators and improves their ultimate performance.

Instead of perforating the diaphragm, we propose a patterned thinning scheme which improves the sensor performance.

By using thinned regions on the diaphragm rather than perforations, the sensitivity of the sensor was improved. The simulation results show that the proposed design provides larger membrane deflections and higher output voltages compared to the pressure sensors with a normal or perforated diaphragm.

The proposed MEMS piezoelectric pressure sensor for the first time takes advantage of thinned diaphragm with optimum pattern of thinned regions, larger outputs and larger sensitivity compared with the simple or perforated diaphragm pressure sensors.

This paper aims to develop a parsimonious and innovative model that captures the dynamics of new product diffusion in the recent high-technology markets and thus assist both academicians and practitioners who are eager to understand the diffusion phenomena. Accordingly, this study develops a novel diffusion model to forecast the demand by centering on the dynamic state of the product’s adoption rate. The proposed study also integrates the consumer’s psychological point of view on price change and goodwill of the innovation in the diffusion process.

In this study, a two-dimensional distribution function has been derived using Cobb–Douglas’s production function to combine the effect of price change and continuation time (goodwill) of the technology in the market. Focused on the realistic scenario of sales growth, the model also assimilates the time-to-time variation in the adoption rate (hazard rate) of the innovation owing to companies changing marketing and pricing strategies. The time-instance upon which the adoption rate alters is termed as change-point.

For validation purpose, the developed model is fitted on the actual sales and price data set of dynamic random access memory (DRAM) semiconductors, liquid crystal display (LCD) monitors and room air-conditioners using non-linear least squares estimation procedure. The results indicate that the proposed model has better forecasting efficiency than the conventional diffusion models.

The developed model is intrinsically restricted to a single generation diffusion process. However, technological innovations appear in generations. Therefore, this study also yields additional plausible directions for future analysis by extending the diffusion process in a multi-generational environment.

This study aims to assist marketing managers in determining the long-term performance of the technology innovation and examine the influence of fluctuating price on product demand. Besides, it also incorporates the dynamic tendency of adoption rate in modeling the diffusion process of technological innovations. This will support the managers in understanding the practical implications of different marketing and promotional strategies on the adoption rate.

This is the first attempt to study the value-based diffusion model that includes key interactions between goodwill of the innovation, price dynamics and change-point for anticipating the sales behavior of technological products.

The purpose of this paper is to provide reference for researchers by reviewing the research advances and trend of agricultural product price forecasting methods in recent years.

This paper reviews the main research methods and their application of forecasting of agricultural product prices, summarizes the application examples of common forecasting methods, and prospects the future research directions.

1) It is the trend to use hybrid models to predict agricultural products prices in the future research; 2) the application of the prediction model based on price influencing factors should be further expanded in the future research; 3) the performance of the model should be evaluated based on DS rather than just error-based metrics in the future research; 4) seasonal adjustment models can be applied to the difficult seasonal forecasting tasks in the agriculture product prices in the future research; 5) hybrid optimization algorithm can be used to improve the prediction performance of the model in the future research.

The methods from this paper can provide reference for researchers, and the research trends proposed at the end of this paper can provide solutions or new research directions for relevant researchers.

This study aims to determine the effect of different friction stir welding (FSW) parameters on mechanical and metallurgical characteristics of aviation-grade AA8090 alloy joints.

Response surface methodology with central composite design is used to design experiments. The mechanical and microstructure characteristics of the weld joints have been studied through a standardized method, and the influence of threaded pins on the joint microstructure has also been assessed.

From a desirability strategy, the optimum parameters setting of the friction stir welding was the tool rotational speed (TRS) of 800, 1,100 and 1,400 rpm; tool traverse speed (TTS) of 20, 30 and 40 mm/min; and tilt angle 1°, 2° and 3° with different tool pin profiles, i.e. cylindrical threaded (CT), square threaded and triangular threaded (TT), for achieving the maximum tensile strength, yield strength (YTS) and % elongation as an output parameter. The TRS speed was the highest weld joint characteristics influencing parameter. Peak tensile strength (378 MPa), percentage elongation (10.1) and YTS (308 MPa) were observed for the optimized parametric value of TRS-1,400, TTS-40 mm/min and TA (3°) along with CT pin profile. Microstructure study of the welded surface was achieved by using scanning electron microscope of output parameters. When the tool rotation speed, tool transverse speed, tilt angle and tool profile are set to moderately optimal levels, a mixed mode of ductile and brittle fracture has been seen during the microstructure analysis of the welded joint. This has been aided by the material’s plastic deformation and the small cracks surrounding the weld zone.

From the reported literature, it has been observed that limited work has been reported on aviation-grade AA8090 alloys. Further thermal behavior of welded joints has also been observed in this experimental work.