Search results

Tape automated bonding (TAB) is an interconnection technique for integrated circuits (ICs) with a small lead pitch and a thin assembly thickness. During inner lead bonding the flying (Au plated Cu) leads of the TAB foil are connected to the Au bumps on the bondpads of an IC. The Au bumps are deposited in the openings of a thick Novolac based resist layer by electroplating. The resist is coated on a sputtered TiW‐Au metallisation; TiW is the barrier layer between Au bump and Al bondpad. Bonding of the leads to the Au bumps requires substantial plastic deformation of the bump and lead. As a result of this deformation, the TiW barrier layer underneath the bump may crack easily. A theoretical model has been used to describe the occurrence of these cracks. This theoretical model is compared with experimental results of deformation and cracking behaviour by visual inspection of the TiW barrier and the etched cross‐sections. Separate (single point) and simultaneous (gang) bonding techniques, different gold plating baths and TAB tapes are used to study the cracking behaviour.

This event, the first sponsored by ISHM, takes place in Pardubice on the 19–20 November 1991. Pardubice is a town of some 100,000 inhabitants about 60 miles east of Prague. A welcome is extended to all ISHM Chapter members.

Flip chip solder joint reliability under thermal shock stress was investigated both experimentally and by 2D finite element simulation. The results indicate that solder fatigue is the dominant failure mode and that delamination has obvious adverse effects on the solder joint lifetime. Different material/process combinations (underfill, flux, reflow atmospheres) were designed in order to understand the role of material/process factors on the solder joint lifetime and the results are discussed.

Flip chip on board (FCOB) solder joint reliability under thermal shock stress was investigated. With underfill materials, the solder joint lifetime was increased from 37 to 1,300/2,480 cycles depending on the particular underfill material used. Through the use of CSAM, SEM, dye penetration tests and cross sectioning, the reliability of a FCOB assembly under thermal shock stress was evaluated. Both dye penetration and SEM fracture analysis can be used to measure quantitatively the extent of crack propagation for assemblies without underfill. A new failure mechanism, PCB cracking was also observed and discussed.

The dry development of a photoresist is modelled using the analytical solution of the Boltzmann equation. It is proposed that at very low pressure and in the presence of a magnetic field, the etch rate of the resist can be calculated by integrating the ion flux. The simulation results illustrates improvement in both microuniformity and macrouniformity when the resist is etched under these process conditions.

Migration is an increasing challenge faced by countries, institutions and individuals both for sending and host countries. The integration of migrants is a multidimensional issue, including several areas, for example, social, cultural, economic, legal and politics. These dimensions can strengthen each other in equal areas, but the economic and social dimensions seem to be the most important regarding immigrant inclusion in the society of the country of settlement.

In a macro perspective, there have been few national models of integrating migrants which are culturally and historically specific in various European countries, but the current approach is focussing on interculturalism.

Considering migrant integration in a meso perspective, one may point to the growing importance of multilevel governance engaging many actors in this process (e.g., municipalities, cities, nongovernmental organizations, SMEs, corporations, churches, etc.), which are partners for national-level policymakers.

The individual effort for successful integration of migrants depends on the host country nationals' attitude, openness and tolerance as well as on incoming foreigners.

ISHM‐Benelux has recently set up a permanent secretariat at the following address:

The purpose of this paper is to present a detailed overview of the current stencil printing process for microelectronic packaging.

This paper gives a thorough review of stencil printing for electronic packaging including the current state of the art.

This article explains the different stencil technologies and printing materials. It then examines the various factors that determine the outcome of a successful printing process, including printing parameters, materials, apparatus and squeegees. Relevant technical innovations in the art of stencil printing for microelectronics packaging are examined as each part of the printing process is explained.

Stencil printing is currently the cheapest and highest throughput technique to create the mechanical and electrically conductive connections between substrates, bare die, packaged chips and discrete components. As a result, this process is used extensively in the electronic packaging industry and therefore such a review paper should be of interest to a large selection of the electronics interconnect and assembly community.