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An experiment was conducted to examine the effect of post‐reflow no‐clean solder paste residue on near‐end and far‐end signal crosstalk due to changes in dielectric constant and leakage resistance in the circuit environment. Additionally, the effect of different frequency levels on post‐reflow residue was examined. Data from these studies are presented in this paper.

Some of you may be surprised to learn of some of the inventions originating from Australian endeavours — the black box flight recorder, atomic absorption spectrophotometer, over‐the‐horizon radar, combine harvester and the all important ‘esky’ cooler, to name but a few. However, in the 1980s the Australian electronics industry found itself in somewhat of a knowledge vacuum when it came to surface mount technology. The introduction of this technology and its advancement were happening overseas and it was taking some time for the information to get down under for Australian designers and manufacturers to apply this new enabling technology.

As the demand for flip‐chip products increases, the need for low cost high volume manufacturing processes also increases. Currently solder paste printing is the wafer bumping method of choice for device pitches down to 150‐200μm. However, limitations in print quality and stencil manufacture mean that this technology is not likely to move significantly below this pitch and new methods will be required to meet the demands predicted by the technology roadmaps. This paper describes experiments conducted on carriers made from silicon for bumping of die using solder paste. An anisotropic etching process was used to generate pockets in the silicon surface into which solder paste was printed. Die were then placed against the carrier and reflowed to transfer the solder directly to the bondpads. An assessment was carried out of the potential application and limitations of this technique for device pitches at 225 and 127μm.