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The purpose of this paper is to propose a Chebyshev collocation method (CCM) for Hallén’s equation of thin wire antennas.

Since the current induced on the thin wire antennas behaves like the square root of the distance from the end, a smoothed current is used to annihilate this end effect. Then the CCM adopts Chebyshev polynomials to approximate the smoothed current from which the actual current can be quickly recovered. To handle the difficulty of the kernel singularity and to realize fast computation, a decomposition is adopted by separating the singularity from the exact kernel. The integrals including the singularity in the linear system can be given in an explicit formula while the others can be evaluated efficiently by the fast cosine transform or the fast Fourier transform.

The CCM convergence rate is fast and this method is more efficient than the other existing methods. Specially, it can attain less than 1 percent relative errors by using 32 basis functions when a/h is bigger than 2×10−5 where h is the half length of wire antenna and a is the radius of antenna. Besides, a new efficient scheme to evaluate the exact kernel has been proposed by comparing with most of the literature methods.

Since the kernel evaluation is vital to the solution of Hallén’s and Pocklington’s equations, the proposed scheme to evaluate the exact kernel may be helpful in improving the efficiency of existing methods in the study of wire antennas. Due to the good convergence and efficiency, the CCM may be a competitive method in the analysis of radiation properties of thin wire antennas. Several numerical experiments are presented to validate the proposed method.

The purpose of this paper to ensure the rapid developments in the radio frequency wireless technology, the synthesis of frequencies for pervasive wireless applications is crucial by implementing the design of low voltage and low power Fractional-N phase locked loop (PLL) for controlling medical devices to monitor remotely patients.

The developments urge a technique reliable to phase noise in designing fractional-N PLL with a new eight transistor phase frequency detector and a good linearized charge pump (CP) for speed of operation with minimum mismatches.

In applications for portable wireless devices, by proposing a new phase-frequency detector with the removal of dead, blind zones and a modified CP to minimize the mismatch of currents.

The results are simulated in 45 nm complementary metal oxide semiconductor generic process design kit (GPDK) technology in cadence virtuoso. The phase noise of the proposed Fractiona-N phase locked loop has–93.18, –101.4 and –117 dBc/Hz at 10 kHz, 100 kHz and 1 MHz frequency offsets, respectively, and consumes 3.3 mW from a 0.45 V supply.