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The effect of a screening oxide layer on 1‐D and 2‐D ion implantation profiles in silicon is investigated using Monte Carlo simulations. Experimental observations of profile broadening by oxide layers are explained by the fact that atoms at lattice positions are less effective in steering ions into channels than atoms at random positions. The influence of the oxide layer on the lateral penetration below a mask is discussed in terms of implantation energy and ion species. A new set of parameters for the electronic stopping of phosphorus and arsenic in silicon is used.

A three‐parameter model for the electronic stopping power of boron in silicon is presented. The model parameters are determined from implantations into amor‐phous silicon and from channeling implantations into <100> and <100> silicon. Simulated boron profiles obtained with the new model, with the Lindhard model, and with the Oen‐Robinson model, respectively, are compared with experimental data on channeling and tilted implantations at 17 and 150 keV.

This paper describes a new two‐dimensional process simulation program MUSIC (MUltigrid Simulator for IC fabrication processes) which is prospective for the efficient IC process simulations due to its capability to eliminate strong bottlenecks present in the existing two‐dimensional process simulation programs. Multistep processes, including ion implantation, diffusion and oxidation, can be simulated, giving the doping profile. Robust and efficient adaptive multigrid numerical techniques for the simulation of coupled multiparticle diffusion processes are used. The capabilities of program MUSIC are illustrated by the results of the process flow simulation of a typical NMOS and bipolar transistors fabricated in BiCMOS technology.

An explanation is given for the apparent accuracy of the most commonly used method for discretization of the stationary continuity equations in semiconductor device models. The accuracy of this method does not depend on relatively small changes in the electrostatic potential or the quasi‐Fermi potentials between neighboring mesh points, or on the flow of current essentially along the mesh lines as has been previously suggested. It is obtained because implicit in this procedure is a consistent, and fairly accurate, discretization of the associated systems for the stream functions and recombination potential. Our analysis indicates suitable choices for various parameters appearing in the discrete system, and conditions on the construction and refinement of a mesh so as to obtain reasonable or optimal accuracy. In addition, it is determined that given the electrostatic potential distribution, the values of the device terminal currents (but not the point values of the carrier densities or the local current densities) can be computed with an accuracy independent of some of the bias voltages by this procedure.

The finite element method is used to solve the non‐linear diffusion equation, taking account of the interaction between impurities due to self‐induced electric field and charged vacancies effects, and of various boundary conditions (evaporation, segregation, oxidation growth…). An incomplete implicit scheme gives the solution of the temporal equation deduced from a quadratic space discretization. The temporal and spatial problems being proved to be quite independent, specific locally refined meshes are developed. The quadratic shape functions allow the use of evolutive mesh for the oxidation simulation without profile degradation. Two realistic industrial steps are described to demonstrate the efficiency of the code.

A very common method to predict the reliability of components soldered on printed circuit board (PCB) or substrates is by bending tests and temperature cycle tests, for instance between ‐55°C and 125°C (up to 2,000 cycles at 1h cycle period). Sensitive SMD constructions such as chips with ball grid array mounting or multilayer chip capacitors (MLCC) are often a major issue due to their “flex cracking” problems. This paper describes the real behaviour of deformation at temperature cycling and PCB bending of chip components (body size 0603). By using the piezoresistive effect in thick film resistors the effects of stress on the alumina body can be determined and described for the whole temperature range of interest. The complete system of component, PCB/substrate and solder joint will be discussed and different influences will be isolated. It will be shown that CTE‐matching of the component and substrate does not lead to an optimum situation. The influence of the solder joint plays an important part. Optimization potentials and design rules for the whole system will be given. The basis of this paper is a quite unusual “measurement tool” the effect of piezoresistivity. The investigation into that phenomenon will be described very thoroughly first.

The coupled set of non‐linear 2D diffusion equations for donor and acceptor type impurities with initial and appropriated boundary conditions is solved by an implicit locally‐one dimensional finite difference method. Numerical experiments have been made to achieve a reasonable trade‐off between the desired accuracy and the CPU time. The algorithm was implemented to the process module of the 2‐D integrated process and device modeling system IMPEDANCE 2.0.

In order to simulate resistive gate transistors, a one‐dimensional simulator, which permits the use of multiple gate contacts on the transistor structure, has been developed. In the case of the multiple gate contact resistive gate transistor, there is a voltage gradient in the gate. The gate voltage thus varies at each point in the channel of the transistor. A gate structure was designed with a geometric profile that gave either a decreasing or an increasing electric field in the gate, depending on the differential voltage applied to the gate contacts. In the saturation region, this parabolically shaped gate structure resulted in a linear relationship between the drain current and the differential gate voltage or gate current. A significant result obtained was the reversal of the drift current direction at certain bias levels. It was also found that the diffusion current may dominate in the strong inversion region of the channel of an NMOS transistor with a resistive gate.

The ability to simulate the effects of process technology on final product circuits has become virtually indispensable in modern VLSI production. It is especially significant as a toot for controlling parametric yield by appropriate design centering and in determining the sensitivity of the electrical parameters to process control tolerances. The system demands the combined use of process simulation device simulation and circuit simulation all three of which rely heavily on computationally intensive numerical solution of partial differential equations. The severe computational overhead involved in ‘technology simulation TCAD)’ means it is generally expensive and limits the scope of statistical design centering and optimisation, which depend on a large number of simulations. A compromise solution is often resorted to by limiting simulation to one or two spatial dimensions, replacing numerical simulation by analytical approximations as implemented in the statistical process simulator: FABRICS 11, or combining numerical and analytical models as in the process/device simulator PRIDE.) This paper addresses the problem of simpler, higher efficiency TCAD evaluation by restricting the domain of the simulation and approximating the process/device characteristic relationship by a set of simple, computationally efficient empirical equations. These equations offer a high speed solution at the expense of decreasing accuracy away from the nominal process centre. Referred to as a ‘response surface model’, it is generated using the results of a small number of statistically designed TCAD simulations. As the process sample is centred around the nominal design parameters, the model can be used to statistically analyze the effects of process perturbations.

There is a lack of efficiency when dealing with information and searching for the right content. Aims to present a procedural model which in essence is a generalized approach to terminology management, with which to build and maintain glossaries and taxonomies.

In addition to an extensive literature review, analysis of three action research cases with several corporate partners is presented. The first case focuses on the introduction of a glossary for a Swiss insurance company. The second illustrates the results from setting up a corporate taxonomy at an international professional services firm. The third case combines glossary and taxonomy for document classification and retrieval.

Glossary and taxonomy are suitable for solving a wide range of terminological defects. Usage and maintenance processes play a central role in the management of terms and should be well defined. Only a well‐suited trade‐off between centralized and decentralized terminology management will be sustainable.

Other means besides clearly defined processes have to be defined to clearly eliminate certain issues. Furthermore, there is the question of whether the implementation of terminology management could benefit certain types of companies in certain industry branches more than others.

Concrete actions that have to be taken into consideration when introducing glossary and taxonomy systems.

Proposes a procedural model for the introduction of glossary and taxonomy as well as the cultivation of a corporate terminology.