The interfacial reliability of through-glass vias for 2.5D integrated circuits

Abstract

Purpose

Glass is a promising interposer substrate for 2.5 D integration; yet detailed analysis of the interfacial reliability of through-glass vias (TGVs) has been lacking. The purpose of this paper is to investigate the design and material factors responsible for the interfacial delamination in TGVs and identify methods to improve reliability.

Design/methodology/approach

The interfacial reliability of TGVs is studied both analytically and numerically. An analytical solution is presented to show the dependence of the energy release rate (ERR) for interfacial delamination on the via design and the thermal mismatch strain. Then, finite element analysis (FEA) is used to investigate the influence of detailed design and material factors, including the pitch distance, via aspect ratio, via geometry and the glass and via materials, on the susceptibility to interfacial delamination.

Findings

ERR for interfacial delamination is directly proportional to the via diameter and the thermal mismatch strain. Thinner wafers with smaller aspect ratios show larger ERRs. Changing the via geometry from a fully filled via to an annular via leads to lower ERR. FEA results also show that certain material combinations have lower thermal mismatch strains, thus less prone to delamination.

Practical implications

The results and approach presented in this paper can guide the design and development of more reliable 2.5 D glass interposers.

Originality/value

This paper represents the first attempt to comprehensively evaluate the impact of design and material selection on the interfacial reliability of TGVs.

Citation

Ahmed, O., Jalilvand, G., Pollard, S., Okoro, C. and Jiang, T. (2020), "The interfacial reliability of through-glass vias for 2.5D integrated circuits", Microelectronics International, Vol. 37 No. 4, pp. 181-188. https://doi.org/10.1108/MI-04-2020-0020