Keywords
Citation
Rigelsford, J. (2003), "Stereolithographic apparatus for packaging electronics", Assembly Automation, Vol. 23 No. 3. https://doi.org/10.1108/aa.2003.03323cad.011
Publisher
:Emerald Group Publishing Limited
Copyright © 2003, MCB UP Limited
Stereolithographic apparatus for packaging electronics
Stereolithographic apparatus for packaging electronics
Keywords: Stereolithography, Electronic packaging, Patents
Applicant: Micron Technology, Inc., USAPatent number: US6,549,821Publication date: 15 April 2003Title: Stereolithographic method and apparatus for packaging electronic components and resulting structures
This patent describes the use of a machine vision system such as a pattern recognition system to facilitate the application of stereolithographic techniques for the fabrication of electronic components and other products.
The present invention employs computer-controlled, 3D CAD initiated, stereolithographic techniques to form structures comprising one or more layers of material abutting a workpiece such as an electronic component with a high degree of precision. More specifically, the packaging method of the present invention may be applied to a semiconductor die mounted to a lead frame (having a die mounting paddle or in a paddle-less leads-over-chip (LOC) or in a leads-under-chip (LUC) configuration), mounted to a carrier substrate in a chip- on-board (COB) or board-on-chip (BOC) arrangement or in other packaging designs.
A machine vision system including at least one camera is connected with a computer controlling a stereolithographic system for application of material so that the system may recognize the position and orientation of workpieces to which the material is to be applied. The requirement for precise mechanical workpiece alignment is eliminated, and the ability of the system to recognize size, configuration and topography of different workpieces affords greater manufacturing flexibility.