Low-power in-pixel buffer circuit for smart image sensor

Abstract

Purpose

The smart image sensor (SIS) which integrated with both sensor and smart processor has been widely applied in vision-based intelligent perception. In these applications, the linearity of the image sensor is crucial for better processing performance. However, the simple source-follower based readout circuit in the conventional SIS introduces significant nonlinearity. This paper aims to design a low-power in-pixel buffer circuit applied in the high-linearity SIS for the smart perception applications.

Design/methodology/approach

The linearity of the SIS is improved by eliminating the non-ideal effects of transistors and cancelling dynamic threshold voltage that changes with the process variation, voltage and temperature. A low parasitic capacitance low leakage switch is proposed to further improve the linearity of the buffer. Moreover, an area-efficient SIS architecture with a sharing mechanism is presented to further reduce the number of in-pixel transistors.

Findings

A low parasitic capacitance low leakage switch and a gate-source voltage pre-storage method are proposed to further improve the linearity of the buffer. Nonlinear effects introduced by parasitic capacitance switching leakage, etc., have been investigated and solved by proposing low-parasitic and low-leakage switches. The linearity is improved without a power-hungry operational amplifier-based calibration circuit and a noticeable power consumption increment.

Originality/value

The proposed design is implemented using a standard 0.18-µm CMOS process with the active area of 102 µm². At the power consumption of 5.6 µW, the measured linearity is −63 dB, which is nearly 27 dB better than conventional active pixel sensor (APS) implementation. The proposed low-power buffer circuit increase not only the performance of the SIS but also the lifetime of the smart perception system.

Citation

Li, Q., Zhu, H., Huang, G., Yu, Z., Qiao, F., Wei, Q., Liu, X. and Yang, H. (2020), "Low-power in-pixel buffer circuit for smart image sensor", Sensor Review, Vol. 40 No. 5, pp. 585-590. https://doi.org/10.1108/SR-03-2019-0067