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Voltage instability curtailment and quality improvement with phasor measurement unit in power system

Kabra Preeti (KLEF, Guntur, India and EEE Department, Deccan College of Engineering and Technology, Hyderabad, India)
Donepudi Sudha Rani (EEE Department, Sri Vasavi College of Engineering, Tadepalligundem, India)

COMPEL - The international journal for computation and mathematics in electrical and electronic engineering

ISSN: 0332-1649

Article publication date: 20 April 2022

Issue publication date: 26 August 2022

67

Abstract

Purpose

The earlier methods are more resilient to improvements such as load shift and path change. This results in problems such as a voltage drop and a high reactive flux. In addition, due to the delay, congestion or interruption of the transmission, the system cannot receive all phasor measurement unit (PMU) measurements at the relevant time as well as the presence of noise in the received data.

Design/methodology/approach

With the development of wide area measurement system technologies, it seems to be possible to track voltage stability online via time-stamped PMUs. As the voltage instability causes a voltage decomposition, voltage instability is one of the most important problems when monitoring the power supply.

Findings

This harmonic distortion significantly decreases the data quality in the grid. As a result, instability ascertainment based on PMU has been suggested as a method for detecting voltage instability in power systems monitored with PMU. In addition, a technique called instability amendment via load dropping has been proposed to keep the device from collapsing due to voltage failure.

Originality/value

To improve the power output, the power prominence melioration technique was developed. This proposed system has been implemented in MATLAB Simulink and compared with the recent researches.

Keywords

Citation

Preeti, K. and Rani, D.S. (2022), "Voltage instability curtailment and quality improvement with phasor measurement unit in power system", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 41 No. 5, pp. 1677-1698. https://doi.org/10.1108/COMPEL-09-2021-0331

Publisher

:

Emerald Publishing Limited

Copyright © 2022, Emerald Publishing Limited

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