A hardware implementation of intelligent ECG classifier

Abstract

Purpose

The purpose of this paper is to design an intelligent ECG classifier using programmable IC technologies to implement many functional blocks of signal acquisition and processing in one compact device. The main microprocessor also simulates the TSK neuro-fuzzy classifier in testing mode to recognize the ECG beats. The design brings various theoretical solutions into practical applications.

Design/methodology/approach

The ECG signals are acquired and pre-processed using the Field-Programmable Analog Array (FPAA) IC due to the ability of precise configuration of analog parameters. The R peak of the QRS complexes and a window of 300 ms of ECG signals around the R peak are detected. In this paper we have proposed a method to extract the signal features using the Hermite decomposition algorithm, which requires only a multiplication of two matrices. Based on the features vectors, the ECG beats are classified using a TSK neuro-fuzzy network, whose parameters are trained earlier on PC and downloaded into the device. The device performance was tested with the ECG signals from the MIT-BIH database to prove the correctness of the hardware implementations.

Findings

The FPAA and Programmable System on Chip (PSoC) technologies allow us to integrate many signal processing blocks in a compact device. In this paper the device has the same performance in ECG signal processing and classifying as achieved on PC simulators. This confirms the correctness of the implementation.

Research limitations/implications

The device was fully tested with the signals from the MIT-BIH databases. For new patients, we have tested the device in collecting the ECG signals and QRS detections. We have not created a new database of ECG signals, in which the beats are examined by doctors and annotated the type of the rhythm (normal or abnormal, which type of arrhythmia, etc.) so we have not tested the classification mode of the device on real ECG signals.

Social implications

The compact design of an intelligent ECG classifier offers a portable solution for patients with heart diseases, which can help them to detect the arrhythmia on time when the doctors are not nearby. This type of device not only may help to improve the patients’ safety but also contribute to the smart, inter-networked life style.

Originality/value

The device integrate a number of solutions including software, hardware and algorithms into a single, compact device. Thank to the advance of programmable ICs such as FPAA and PSoC, the designed device can acquire one channel of ECG signals, extract the features and classify the arrhythmia type (if detected) using the neuro-fuzzy TSK network in online mode.

Citation

Tran , H.L., Pham, V.N. and Nguyen, D.T. (2015), "A hardware implementation of intelligent ECG classifier", COMPEL - The international journal for computation and mathematics in electrical and electronic engineering, Vol. 34 No. 3, pp. 905-919. https://doi.org/10.1108/COMPEL-05-2014-0119